Texas Instruments ADS131B26Q1EVM-PDK, User Manual

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3 Digital Interface
As noted in Section 1 , the EVM interfaces with the PHI controller and communicates with the PC over USB.
There are two devices on the EVM with which the PHI controller communicates: the ADS131B26-Q1 (by SPI)
and the EEPROM (by I
2
C). The EEPROM comes preprogrammed with the information required to configure and
initialize the ADS131B26Q1EVM-PDK GUI software. When the hardware is initialized, the EEPROM is no longer
used.
3.1 Connection to the PHI Controller
The ADS131B26Q1EVM-PDK communicates with the PHI controller through a shrouded, 60-pin connector (J9).
There are two round standoffs next to J9 with Phillips-head screws. To connect the PHI controller to the EVM,
remove the screws, attach the PHI controller to the EVM, and replace the screws into the standoffs. The screws
secure the EVM to the PHI and makes sure the connection between the two boards is complete.
Table 3-1 lists the different PHI connection and their functions.
Table 3-1. PHI Connector Pin Functions
PHI Connector Pin Name PHI Connector Pin Function
EVM_REG_5.5V J9[1] Boosted 5.5-V supply from the USB (not used)
EVM_RAW_5V J9[2] Raw USB 5-V supply; optional supply for the DC/DC input
ISO_GND J9[3] Ground connection for the isolated host controller side of the EVM
ISO_GPIO0/MHD J9[6] General-purpose digital input/output 0 or missing host detect output
ISO_GPIO1 J9[8] General-purpose digital input/output 1
ISO_GPIO2/FAULT J9[10] General-purpose digital input/output 2 or fault output
ISO_GPIO3/OCCA J9[12]
General-purpose digital input/output 3 or overcurrent comparator A
output
ISO_GPIO4/OCCB J9[14]
General-purpose digital input/output 4 or overcurrent comparator B
output
ISO_SDI J9[18] SPI: Serial data input to the ADC
ISO_CSn J9[22] SPI: Chip-select input from the PHI controller; active low
ISO_SCLK J9[24] SPI: Serial data clock input
ISO_CAPCLK J9[26, 28]
PHI clock signal to synchronize SPI transactions with the
propagation delay from the EVM
ISO_DRDYn J9[30] SPI: Data-ready output from the ADC; active low
ISO_SDO J9[38] SPI: Serial data output from the ADC
ISO_RESETn J9[46] Reset input; active low
WP J9[49] Write protection for the EEPROM
ISO_3V3 J9[50]
Power-supply source for the isolated host controller side of the EVM
and default supply input to the DC/DC circuit
EVM_ID_SDA J9[56] I
2
C serial data for the EEPROM
EVM_ID_SCL J9[58] I
2
C serial clock for the EEPROM
ID_PWR J9[59] Power-supply source for the EEPROM
ISO_GND J9[60] Ground connection for the isolated host controller side of the EVM
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SBAU413 – OCTOBER 2022
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ADS131B26Q1EVM-PDK Evaluation Module 9
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