Texas Instruments ADS127L11EVM, User Manual, Page: 5 / 35

2 EVM Analog Interface
The ADS127L11EVM is designed for easy interfacing with analog sources. This section covers the details of the
front-end circuit, including jumper configuration for different input test signals and board connectors for signal
sources.
2.1 EVM Analog Input Options
For best performance, differential analog input signals can be connected through the SMA connectors (J3 and
J6). There is also a header, J4, that can be used to directly connect inputs for dc measurements, or where
best ac performance is not needed. For single-ended inputs, header J4 can be used to connect AINN or AINP
to GND using the supplied shunt. Then use either J3 or J6 as the single-ended input. The input driver circuit
uses the
THS4551 fully-differential amplifier in a unity-gain configuration with a single-pole RC filter at the output.
Multiple passive components around the amplifier are intentionally left uninstalled to give users the flexibility to
customize the input drive circuit for their specific application.
When differential inputs are connected to the SMA connectors (J3 and J6), make sure header J4 does not have
any connection to pins 1 or 3. Only connect the included shunt to pin 2, and not between pins 1-2 or 1-3 for
differential inputs.
2.2 ADC Connections and Decoupling
The circuit shown in Figure 2-1 shows all connections to the ADS127L11 data converter (U3). Each power-
supply connection has a 1-μF and 100-nF decoupling capacitor. Make sure these capacitors are physically close
to the device and have a good connection to the GND plane. The supply connections also have a series 0.1-Ω
resistor. The purpose of this component is to facilitate current measurement for the ADC. Also, each digital input
has a 10-Ω series resistor. These resistors smooth the edges of the digital signals so that they have minimal
overshoot and ringing. Although not strictly required, these components may be included in the final design to
improve digital signal integrity.
GND
1uF
C12
IOVDD
100k
R19
100k
R20
0.1
R15
IOVDD
1uF
C8
0.1
R11
AVDD2
1uF
C10
1uF
C11
GND
1uF
C6
0.1
R7
AVDD1
AINP
AINN
REFP
REFN
VCM
ADS127L11
1uF
C15
ADC.SCLK
ADC.SDI
ADC.SDO/DRDY
ADC.CS
ADC.DRDY
ADC.START/SYNC
AVSS
AVSS
AVSS
TP7
A1+
DNP
TP8
A1-
DNP
TP9
A2+
DNP
TP10
A2-
DNP
TP11
D+
DNP
TP12
D-
DNP
CAPA
1
AVDD2
2
AVDD1
3
AINP
4
AINN
5
VCM
6
REFP
7
REFN
8
RESET
9
CS
10
SDI
11
SCLK
12
SDO/DRDY
13
DRDY
14
CLKIN
15
IOVDD
16
DGND
17
CAPD
18
START/SYNC
19
AVSS
20
ADS127L11PW
U3
10.0
R9
10.0
R10
10.0
R12
10.0
R13
10.0
R14
10.0
R16
10.0
R18
10.0
R8
10.0
R95
DNP
RET_SCLK
CAP_SCLK
100nF
C7
100nF
C9
100nF
C13
100nF
C16
CLK
3.01
R94
ADC.RESET
Figure 2-1. ADS127L11 Connections and Decoupling
www.ti.com EVM Analog Interface
SBAU351 – APRIL 2021
Submit Document Feedback
ADS127L11EVM-PDK Evaluation Module 5
Copyright © 2021 Texas Instruments Incorporated