Texas Instruments ADS127L11EVM, User Manual, Page: 10 / 35

3 Digital Interface
As noted in Section 1 , the EVM interfaces with the PHI and communicates with the computer over the USB.
There are two devices on the EVM with which the PHI communicates: the ADS127L11 ADC (over SPI) and
the EEPROM (over I
2
C). The EEPROM comes preprogrammed with the information required to configure and
initialize the ADS127L11 platform. When the hardware is initialized, the EEPROM is no longer used.
3.1 Serial Interface (SPI)
The ADS127L11 ADC uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1). Because the serial
clock (SCLK) frequency can be as fast as 40 MHz, the ADS127L11 EVM offers 10-Ω resistors between the
SPI signals to aid with signal integrity. Typically, in high-speed SPI communication, fast signal edges can cause
overshoot; these 10-Ω resistors slow down the signal edges in order to minimize signal overshoot. J2 provides
test points to measure the digital signals.
Digital Interface
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GND
MP1
GND
MP2
GND
MP3
GND
MP4
J1
GND GND
EVM_ID_SDA
EVM_ID_SCL
EVM_5V
0
R21
EVM_ID_PWR
GND
10uF
C14
10uF
C17
GND
GND
GND
EVM_REG_5V5
EVM_DVDD
GND
RESET
START/SYNC
SDI
CS
SCLK
DRDY
SDO/DRDY
MCLK_IN
MCLK_OUT
RESET
START/SYNC
SDI
CS
SCLK
DRDY
SDO/DRDY
MCLK_IN
MCLK_OUT
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17 16
18
J2
TSW-109-07-G-D
TP5
GND
DNP
TP6
EVM_5V
DNP
RET_SCLK
CAP_SCLK
Figure 3-1. Connection to Digital Signals on PHI and Test Points
3.2 I2C Bus for Onboard EEPROM
The circuit shown in Figure 3-2 is used with our EVM controller (PHI), for EVM identification. This circuit is not
required by the ADS127L11 for operation. The jumper (JP1) is a write protect and does not need to be changed
for EVM operation.
A0
1
A1
2
A2
3
VSS
4
SDA
5
SCL
6
WP
7
VCC
8
U2
BR24G32FVT-3AG E2
EVM_ID_PWR
EVM_ID_PWR
GND
EVM_ID_SCL
EVM_ID_SDA
EVM_ID_PWR
GND
GND
GND
EVM ID EEPROM
10.0k
R3
1
2
JP1
EEPROM_EN
DNP
100nF
C1
100nF
C4
Figure 3-2. EEPROM for EVM ID
Digital Interface www.ti.com
10 ADS127L11EVM-PDK Evaluation Module SBAU351 – APRIL 2021
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