Tews Technologies TPMC467-10R, User Manual

Page: 14 / 30

4 XR17D154 Target Chip
4.1 PCI Configuration Registers (PCR)
PCI CFG
Register
Address Write ‘0’ to all unused (Reserved) bits PCI
writeable Initial Values
(Hex Values)
31 24 23 16 15 8 7 0
0x00 Device ID Vendor ID N 01D3 1498
0x04 Status Command Y 0080 0000
0x08 Class Code Revision ID N 070002 ??
0x0C BIST Header Type PCI Latency
Timer
Cache Line
Size
N 00 00 00 00
0x10 Memory Base Address Register (BAR) Y FFFFF000
0x14 I/O Base Address Register (Unimplemented) N 00000000
0x18 Base Address Register 0 (Unimplemented) N 00000000
0x1C Base Address Register 1 (Unimplemented) N 00000000
0x20 Base Address Register 2 (Unimplemented) N 00000000
0x24 Base Address Register 3 (Unimplemented) N 00000000
0x28 Reserved N 00000000
0x2C Subsystem ID Subsystem Vendor ID N s.b. 1498
0x30 Expansion ROM Base Address (Unimplemented) N 00000000
0x34 Reserved N 00000000
0x38 Reserved N 00000000
0x3C Max_Lat Min_Gnt Interrupt Pin Interrupt Line Y[7:0] 00 00 01 00
Table 4-1 : PCI Header
Device-ID: 0x01D3 TPMC467
Vendor-ID: 0x1498 TEWS TECHNOLOGIES
Revision ID: XR17D154 silicon revision
Subsystem-ID: 0x000A
0x000B -10R
-11R
Subsystem
Vendor-ID:
0x1498 TEWS TECHNOLOGIES
TPMC467 User Manual Issue 1.0.4 Page 14 of 30