Tews Technologies TCP872 User Manual Download Page 12

 

 

TCP872 V1.0 User Manual Issue 1.1 

Page 12 of 16 

4 PCI1520 PC Card Controller 

4.1  PCI Configuration Registers (Functions 0 and 1) 

4.1.1 PCI Header of the TCP872 Version 1.0 

 

PCI CFG 

Register 
Address 

31              24 

23              16 

15                8 

7                  0 

PCI 

write 

able 

Read after 

Reset 

(Hex-Value) 

0x00 Device-ID 

Vendor-ID 

AC55104C 

0x04 Status 

Command 

02100000 

0x08 

Class Code 

Revision ID 

06070001 

0x0C 

BIST 

Header Type 

PCI Latency 

Timer 

Cache line Size 

Y[7:0] 

00820000 

0x10 

CardBus Socket/ExCA Base Address 

00000000 

0x14 Secondary 

Status 

Reserved 

Capability 

Pointer 

N 020000A0 

0x18 CardBus 

Latency Timer 

Subordinate 

Bus Number 

CardBus Bus 

Number 

PCI Bus 

Number 

Y 00000000 

0x1C 

CardBus Memory Base Register 0 

00000000 

0x20 

CardBus Memory Limit Register 0 

00000000 

0x24 

CardBus Memory Base Register 1 

00000000 

0x28 

CardBus Memory Limit Register 1 

00000000 

0x2C 

CardBus I/O Base Register 0 

00000000 

0x30 

CardBus I/O Limit Register 0 

00000000 

0x34 

CardBus I/O Base Register 1 

00000000 

0x38 

CardBus I/O Limit Register 1 

00000000 

0x3C 

Bridge Control Register 

Interrupt Pin 

Interrupt Line 

034001FF 

0x40 

Subsystem ID 

Subsystem Vendor ID 

23681498 

0x44 

PC Card16 I/F legacy mode base address 

00000001 

0x48-0x7C Reserved 

00000000 

0x80 System 

Control Y 

2844D061 

0x84 Reserved N 

00000000 

0x8C Multifunction 

Routing Y 

00C01D02 

0x90 

Diagnostic 

Device Control 

Card Control 

Retry Status 

616400C0 

0x94 Reserved Y 

00000000 

0x98 Reserved Y 

00000000 

0x9C Reserved N 

00000000 

0xA0 

Power Management Capabilities 

Next Item 

Pointer 

Capability ID 

7E120001 

0xA4 

PM data 

PMCSR bridge 

support 

Power Management 

status/control 

Y 00C00000 

0xA8 

General Purpose Event Enable 

General Purpose Event Status 

00000000 

0xAC 

General Purpose Output 

General Purpose Input  

00000000 

0xB0 Serial 

Bus 

Control /Status 

Serial Bus 

Slave Address 

Serial Bus 

Index 

Serial Bus Data 

00000000 

0xB4-0xFC Reserved 

00000000 

Figure 4-1 :  PCI Configuration Register 

 

Summary of Contents for TCP872

Page 1: ...September 2006 TEWS TECHNOLOGIES GmbH TEWS TECHNOLOGIES LLC Am Bahnhof 7 25469 Halstenbek Germany www tews com Phone 49 0 4101 4058 0 Fax 49 0 4101 4058 19 e mail info tews com 9190 Double Diamond Pa...

Page 2: ...S TECHNOLOGIES GmbH reserves the right to change the product described in this document at any time without notice TEWS TECHNOLOGIES GmbH is not liable for any damage arising out of the application or...

Page 3: ...TCP872 V1 0 User Manual Issue 1 1 Page 3 of 16 Issue Description Date 1 0 First Issue August 2004 1 1 New address TEWS LLC September 2006...

Page 4: ...PC Card16 mode 8 3 1 1 Memory Mapping 8 3 1 2 I O Mapping 9 3 2 Address Mapping TCP872 CardBus mode 10 3 3 PCI Interrupts 11 4 PCI1520 PC CARD CONTROLLER 12 4 1 PCI Configuration Registers Functions 0...

Page 5: ...PC CARD MEMORY MAPPING 8 FIGURE 3 2 PCI TO PC CARD I O MAPPING 9 FIGURE 3 3 CARDBUS WINDOW MECHANISM 10 FIGURE 3 4 SOCKET REGISTERS IMPLEMENTED IN PCI1520 FUNCTION 0 AND 1 10 FIGURE 4 1 PCI CONFIGURA...

Page 6: ...d up to two I O windows are available for PC Card16 accesses For 32 bit CardBus cards two memory windows and two I O windows are supported by the controller CardBus card status information can be acce...

Page 7: ...face PC Card Sockets 2 sockets for two cards of types I and II or one card of type III PC Card Operating Voltage 3 3V or 5V PC Card Programming Voltage 3 3V 5V or 12V PC Card Supply Current 1A maximum...

Page 8: ...access space or directly via PCI memory address space 3 1 Address Mapping TCP872 PC Card16 mode The PCI1520 provides a window mechanism to link the PCI space to PC Card16 address space Memory and I O...

Page 9: ...Card I O mapping To open I O window software must provide the PCI1520 with I O start address I O stop address and I O offset PC Card16 I O is accessed only if the address window is enabled and if the...

Page 10: ...by the device driver software points to five 32 bit registers which can be located anywhere in the PCI memory space at a 1 Kbytes boundary at offset 0x00 Each socket has a separate base address regist...

Page 11: ...rd status change interrupt which can notify the system of change in the PC Card battery voltage levels PC Card insertion removal detection Ready Busy condition and functional status change for both so...

Page 12: ...egister 0 Y 00000000 0x30 CardBus I O Limit Register 0 Y 00000000 0x34 CardBus I O Base Register 1 Y 00000000 0x38 CardBus I O Limit Register 1 Y 00000000 0x3C Bridge Control Register Interrupt Pin In...

Page 13: ...gister PCI 0x80 0x0A 0x28D061 Multifunction Routing Register PCI 0x8C 0x0D 0x00C01D02 Retry Status Register PCI 0x90 0x11 0xC0 Card Control Register PCI 0x91 0x12 0x00 Device Control Register PCI 0x92...

Page 14: ...ISA IRQ 2 to 15 To enable the parallel ISA IRQs on these pins the following settings must be done by software Register Offset Required Value ISA Routing Multifunction routing 0x8C Bits 27 24 0x2 0xF...

Page 15: ...be programmed to other functions by software To provide access to the multifunction signals of the PCI1520 the TCP872 provides a 10 pin flat cable header Figure 4 4 Position of X2 X2 Signal Default F...

Page 16: ...software device driver should perform the following initialization steps The CardBus Latency Timer Register at offset 0x1B in the PCI Configuration space should be set to a value of 0x20 A Memory and...

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