71M6513/71M6513H Demo Board User’s Manual
Page: 40 of 112
©
2005-2006 TERIDIAN Semiconductor Corporation
Revision 5.6
1.10.3 USEFUL CLI COMMANDS INVOLVING THE MPU AND CE
Table 1-13 shows a few essential commands involving MPU data memory.
Command
Description
>)1=2
Clears the accumulators for Wh, VARh, and VAh by setting bit 1 of the
CONFIG
register.
>)A=+2080
Applies the value 208A to the IMAX register
>)9=+6000
Applies the value 600V to the VMAX register
>)22?
Displays the operating time since the last power up (in 1/100 of hours)
>)2F$$
Displays the total accumulated imported Wh energy (two $$ used for full 64 bit hex display)
>MR2.1
Displays the current RMS voltage in phase A
>MR1.2
Displays the current RMS current in phase B
>RI5=26
Disables the emulator clock by setting bit 5 in I/O RAM address 0x05.
>RI5=6
Re-enables the emulator clock by clearing bit 5 in I/O RAM address 0x05.
>RI1C=1
Increments the RTC clock by one second.
]U
Stores the current CE RAM variables in flash memory. The stored variables will be applied by the
MPU at the next reset or power-up if no valid data is available from the EEPROM.
>CLS
Stores the current CE RAM variables in EEPROM memory. The stored variables will be applied by
the MPU at the next reset or power-up.
Table 1-13: CLI Commands for MPU Data Memory
1.10.4 DEMO CODE FOR NEUTRAL DETECTION (DEMO BOARD D6513T3C1)
Normally a high neutral current indicates tampering, perhaps from a grounded or bypassed power conductor.
The Neutral Current measurement is performed by acquiring the signal from a fourth current transformer that is
connected to the auxiliary analog input, the V3 pin (pin 86). The analog data measured on this pin is referenced
to the VBIAS pin (pin 81).
The ICs supplied with the 71M6513/6513H Demo Kits may contain firmware versions with and without neutral
current. On the CD-ROM containing the firmware sources and documentation, the files supporting neutral
current code end with "NC".
Neutral current is read using alternate multiplexer cycles, as controlled by the
MUX_ALT
bit in I/O RAM. While
the TERIDIAN standard Demo Code revision 3.04 performs one alternate multiplexer cycle per second, the
neutral current-capable Demo Code can perform alternate multiplexer cycles more frequently. When the
alternate multiplexer cycle is triggered once every 10th CE_BUSY interrupt (i.e. every 3.97ms, or 252Hz), no
interference with regular power measurement occurs, and the neutral current is still measured with an accuracy
of about 1.5%.
The sampling rate for the neutral current can be changed by changing the MPU (XDATA) address
ALT_MUX_RATE
, which is located at CE DRAM address 0x0F. The sample rate (2520.6), divided by the value
entered into
ALT_MUX_RATE
controls the number of neutral current samples per second:
RATE
MUX
ALT
f
_
_
6
.
2520
=
When the value of
ALT_MUX_RATE
decreased, the sample rate for the neutral current increases. The Minimum
value for
ALT_MUX_RATE
is 10, i.e. 252Hz is the maximum recommended sample rate for neutral current.
On Demo Code without neutral current, MPU XDATA address 0x0F accesses a reserved (and unused) memory
location.
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