SDI-FMC User Manual
43
April 22, 2019
Button Released: 12G SDI
For 3G-SDI Loopback Test
Button Pressed: SD SDI
Button Released: 3G SDI
SWITCH0(SW2.1)
3G SDI Loopback direction control.
1(Up) : CH0 TX / CH1 RX,
0 (Down): CH0 RX / CH1 TX
SWITCH1(SW2.2)
Si5344 27Mhz Reference Clock Selection
1 (Up): From LMH1983
0 (Down): From FPGA
SWITCH2(SW2.3)
LMH1983 Mode Selection
1 (Up): Select Mode 0, AV-Sync Mode
0 (Down): Select Mode 3, Free-Run Mode
◼
Project Source Code
The source code of Quartus project for the loopback demo with the A10GFP board is available in
the “Demonstrations\A10GFP_12G_SDI” folder from the SDI-FMC System CD.
4
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5
5
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D
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m
m
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o
o
o
n
n
H
H
A
A
N
N
P
P
i
i
l
l
o
o
t
t
P
P
l
l
a
a
t
t
f
f
o
o
r
r
m
m
This section will demonstrate connect the SDI-FMC daughter card to the HAN pilot platform and
perform loopback test of 12G and 3G SDI image data. This demonstration has built-in 12G and 3G
SDI pattern generator IP in the HAN pilot platform FPGA. It is used to output the color bar pattern
through the TX port of the SDI FMC daughter card.
In this demonstration, use the BNC cables to connect the image data output by the TX port back to
Summary of Contents for SDI-FMC
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