Terasic P0006 User Manual Download

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Board Components

Figure 3.7 Santa Cruz connector pin-outs

Table 3.4 The pin assignments of the Santa Cruz connector J3

SC Pin Number

SC Signal Name

HSMC Pin

Number

HSMC Signal Name

HSMC Pin Name

PROTO_IO40

HSPROTO_IO40

HSMC_TX_N0

PROTO_IO29

HSPROTO_IO29

HSMC_TX_P1

PROTO_IO30

HSPROTO_IO30

HSMC_TX_N1

PROTO_IO31

HSPROTO_IO31

HSMC_TX_P2

PROTO_IO32

HSPROTO_IO32

HSMC_TX_P3

PROTO_IO33

HSPROTO_IO33

HSMC_TX_N2

PROTO_IO34

HSPROTO_IO34

HSMC_TX_P4

PROTO_IO35

HSPROTO_IO35

HSMC_TX_N3

PROTO_IO36

HSPROTO_IO36

HSMC_TX_P5

PROTO_IO37

HSPROTO_IO37

HSMC_TX_N4

PROTO_IO38

HSPROTO_IO38

HSMC_TX_P6

PROTO_IO39

HSPROTO_IO39

HSMC_TX_N5

Table 3.5 The pin assignments of the Santa Cruz connector J4

SC Pin Number

SC Signal Name

HSMC Pin

Number

HSMC Signal Name

HSMC Pin Name

OSC

HSMC_CLKOUT_P1

CLK1

HSMC_CLKOUT_N1

CLK2

HSMC_CLKIN_N1

Summary of Contents for P0006

Page 1: ...Terasic THDB SUM T T T THDB HDB HDB HDB SUM SUM SUM SUM Terasic HSMC to Santa Cruz Daughter Board User Manual Document Version 1 3 JULY 29 2009 by Terasic ...

Page 2: ...HE HSMC CONNECTOR 6 3 2 SANTA CRUZ CONNECTOR 10 3 3 USB ON THE GO TRANSCEIVER 14 3 4 MICTOR CONNECTOR 16 3 5 SD CARD INTERFACE 18 3 6 SMA CONNECTOR 19 3 7 I2C SERIAL EEPROM 20 3 8 POWER SUPPLY 21 DEMONSTRATION 22 4 1 CONNECTING THDB SUM BOARD TO CYCLONE III START BOARD 22 APPENDIX 24 5 1 REVISION HISTORY 24 5 2 ALWAYS VISIT THDB SUM WEBPAGE FOR NEW MAIN BOARD 24 ...

Page 3: ... interface to be enabled by jumper selection Finally the source signals from the HSMC interface to the SC header on the THDB SUM board will be passed through level shifters to adjust the logic level difference between the HSMC and SC interface board 1 1Features Figure 1 1 shows the photo of the THDB SUM board The important features are listed below One HSMC connector for interface conversion One S...

Page 4: ...Introduction 2 1 2Getting Help Here are some places to get help if you encounter any problem Email to support terasic com Taiwan China 886 3 550 8800 Korea 82 2 512 7661 Japan 81 428 77 7000 ...

Page 5: ...onents Mictor Connector J2 SMA Connector J6 JTAG TDI TDO Loopback Header JP0 HSMC Logical Level Configuration Header JP3 USB SC Function Select Header JP1 SC Connector Logical Level Configuration Header JP3 Level Shifters U7 U8 USB Host Peripheral Mode Configuration Header JP2 Santa Cruz Connector J5 Santa Cruz Connector J4 Santa Cruz Connector J3 Level Shifters U3 U6 Bus Switch U1 U2 Mini USB AB ...

Page 6: ...5 Mictor connector J2 SMA connector J6 Hi Speed USB On The Go transceiver U11 o Fully compliant with Universal Serial Bus Specification Rev 2 0 o Supplement to the USB 2 0 Specification Rev 1 3 o Supplement UTMI Low Pin Interface ULPI Specification Rev 1 1 Mini USB AB type receptacle connector J8 Logic level configuration headers JP3 JP4 SD Card socket J7 I2C serial EEPROM U10 Level translator U3 ...

Page 7: ...rface Mictor Connector Interface External Clock Input I2C Interface SC Interface THDB SUM USB Interface USB Transceiver Mictor Connector Bus Switch Santa Cruz Connector SD Card Socket SMA Connector Level Shift Level Shift I2C Serial EEPROM To HSMC Interface Host Board Figure 2 3 The block diagram of the THDB SUM board ...

Page 8: ...UM board THDB SUM board contains an Altera standard HSMC connector All the other connector interfaces on the THDB SUM board are connected to the HSMC connector Figure 3 1 Figure 3 2 and Figure 3 3 show the pin outs of the HSMC connector Also the JTAG interface of the HSMC connector is shown in the Figure 3 4 If users don t need to use the JTAG interface on the THDB SUM board please short the heade...

Page 9: ..._TMS HSMC_TDI SD Wpn NC NC 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 2 4 NC NC NC NC NC NC NC NC NC NC NC NC NC NC HSMC_SDA HSMC_TCK HSMC_TDO SD DAT1 NC NC 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 3 Figure 3 1 The pin outs of Bank 1 on the HSMC connector ...

Page 10: ...6 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 SD_DAT0 SD_CLK SD_CMD HSPROTO_IO40 HSPROTO_IO29 HSPROTO_IO30 HSPROTO_IO31 HSPROTO_IO33 HSPROTO_IO32 HSPROTO_IO35 HSPROTO_IO34 HSPROTO_IO37 HSPROTO_IO36 HSPROTO_IO39 HSPROTO_IO38 HSPROTO_IO15 HSPROTO_IO16 HSPROTO_IO17 OSC CLK1 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 ...

Page 11: ...OR_D1 VCC33 MICTOR_D4 MICTOR_D5 VCC33 MICTOR_D2 MICTOR_D3 VCC33 MICTOR_D6 MICTOR_D13 VCC33 MICTOR_D12 MICTOR_D11 VCC33 MICTOR_D10 MICTOR_D9 VCC33 MICTOR_D8 MICTOR_D7 VCC33 HSPROTO_IO18 HSPROTO_IO19 VCC33 HSPROTO_IO20 HSPROTO_IO21 VCC33 HSPROTO_IO22 TR_CLK VCC33 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 Figure 3 3 The pin...

Page 12: ...s level shift chips convert the logic levels of the signals between the HSMC and Santa Cruz connectors according to the configurations of the headers JP3 JP4 With this feature users can use different I O standards between the HSMC host board and SC interface daughter board Table 3 2 and Table 3 3 list the configurations of the voltage level of the HSPROTO_IO BUS and the PROTO_IO BUS respectively B...

Page 13: ...on the HSPROTO_IO BUS JP3 setting Logic level of the HSPROTO_IO BUS Open 2 5V Close 3 3V Table 3 3 The configuration of the logic level on the PROTO_IO BUS JP4 setting Logic level of the PROTO_IO BUS Open 3 3V Close 5V Finally Figure 3 5 shows the pin outs of the Santa Cruz connector Detailed pin mappings between J3 J4 and J5 to the HSMC connector is listed in Table 3 4 Table 3 5 and Table 3 6 res...

Page 14: ...X_P2 7 PROTO_IO32 65 HSPROTO_IO32 HSMC_TX_P3 8 PROTO_IO33 61 HSPROTO_IO33 HSMC_TX_N2 9 PROTO_IO34 71 HSPROTO_IO34 HSMC_TX_P4 10 PROTO_IO35 67 HSPROTO_IO35 HSMC_TX_N3 11 PROTO_IO36 77 HSPROTO_IO36 HSMC_TX_P5 12 PROTO_IO37 73 HSPROTO_IO37 HSMC_TX_N4 13 PROTO_IO38 83 HSPROTO_IO38 HSMC_TX_P6 14 PROTO_IO39 79 HSPROTO_IO39 HSMC_TX_N5 Table 3 5 The pin assignments of the Santa Cruz connector J4 SC Pin Nu...

Page 15: ..._RX_N5 14 PROTO_IO11 84 HSPROTO_IO11 HSMC_RX_P6 15 PROTO_IO12 86 HSPROTO_IO12 HSMC_RX_N6 16 PROTO_IO13 90 HSPROTO_IO13 HSMC_RX_P7 17 PROTO_IO14 92 HSPROTO_IO14 HSMC_RX_N7 18 PROTO_IO15 85 HSPROTO_IO15 HSMC_TX_N6 21 PROTO_IO16 89 HSPROTO_IO16 HSMC_TX_P7 23 PROTO_IO17 91 HSPROTO_IO17 HSMC_TX_N7 25 PROTO_IO18 143 HSPROTO_IO18 HSMC_TX_P15 27 PROTO_IO19 145 HSPROTO_IO19 HSMC_TX_N15 28 PROTO_IO20 149 HS...

Page 16: ...ld like to choose the function of USB transceiver please turn on JP2 For more detailed information about this transceiver please refer to the datasheet which can be found in the NXP s website In addition for OTG implementations a 2 pin header named JP1 is connected with ID identification pin of the USB OTG transceiver and micro USB receptacle As shown in Figure 3 8 The logic level of the ID pin on...

Page 17: ...G Transceiver U11 USB Pin Number USB Signal Name HSMC Pin Number HSMC Signal Name HSMC Pin Name 1 USB_D0 48 HSPROTO_RESET HSMC_RX_P0 17 USB_RESET_n 86 HSPROTO_IO12 HSMC_RX_N6 19 USB_DIR 84 HSPROTO_IO11 HSMC_RX_P6 20 USB_STP 80 HSPROTO_IO10 HSMC_RX_N5 21 USB_NXT 78 HSPROTO_IO9 HSMC_RX_P5 23 USB_D7 74 HSPROTO_IO8 HSMC_RX_N4 24 USB_D6 72 HSPROTO_IO7 HSMC_RX_P4 25 USB_D5 68 HSPROTO_IO6 HSMC_RX_N3 26 U...

Page 18: ... outs Table 3 9 The pin assignments of the Mictor connector J2 Mictor Connector Pin Number Mictor Connector Signal Name HSMC Pin Number HSMC Signal Name HSMC Pin Name 5 MICTOR_CLK 156 MICTOR_CLK HSMC_CLKIN_P2 6 TR_CLK 157 TR_CLK HSMC_CLKOUT_N2 7 MICTOR_D24 132 MICTOR_D24 HSMC_RX_P13 8 MICTOR_D13 121 MICTOR_D13 HSMC_TX_N11 9 MICTOR_D23 128 MICTOR_D23 HSMC_RX_N12 10 MICTOR_D12 125 MICTOR_D12 HSMC_TX...

Page 19: ...0 HSMC_TX_P8 11 MICTOR_TDO 37 HSMC_TDO HSMC_TDO 15 MICTOR_TCK 35 HSMC_TCK HSMC_TCK 17 MICTOR_TMS 36 HSMC_TMS HSMC_TMS 19 MICTOR_TDI 38 HSMC_TDI HSMC_TDI To use this interface user needs to configure the JTAG interface on the HSMC interface host board For example the steps of controlling the Cyclone III start board using Mictor interface is shown below 1 Connecting the THDB SUM board to the Cyclone...

Page 20: ...O JP8 USB3V Cyclone III Start Board THDB SUM Board SHORT Mictor connector J2 MICOTR_TDI MICOTR_TDO MICOTR_TDI MICOTR_TDO OPEN CLOSE Figure 3 11 The JTAG chain between the THDB SUM board and Cyclone III Start Board 3 5 SD Card Interface This section describes the SD Card Interface on the THDB SUM board The THDB SUM has a SD card socket and can be accessed as optional external memory in both SPI and...

Page 21: ...HSMC Pin Name 1 LF_DAT3 42 SD_DAT3 HSMC_D1 2 LF_CMD 47 SD_CMD HSMC_TX_P0 5 LF_CLK 43 SD_CLK HSMC_D2 7 LF_DAT0 41 SD_DAT0 HSMC_D0 8 LF_DAT1 39 SD_DAT1 HSMC_CLKOUT0 9 LF_DAT2 44 SD_DAT2 HSMC_D3 11 LF_WPn 40 SD_WP_N HSMC_CLKIN0 3 6 SMA Connector This section describes the SMA connector on the THDB SUM board The THDB SUM board provides a SMA connector J6 for external clock input The pin assignments of...

Page 22: ...mation or user s data The detailed pin description between EEPROM and HSMC connector is listed in the Table 3 12 HSMC Connector EEPROM U10 HSMC_SCL HSMC_SDA R31 SCL SDA A0 A1 A2 R32 VCC33 R33 R34 VCC33 R35 R36 VCC33 Default Address 0x0 Table 3 13 The block diagram of the EEPROM and HSMC connector Table 3 12 The pin assignments of the EEPROM U10 EEPROM Pin Number EEPROM Signal Name HSMC Pin Number ...

Page 23: ... on the THDB SUM board is shown in Figure 3 14 HSMC Connector J1 Level Shifters U3 U8 VCCA VCCB REG1 JP3 REG2 REG3 Level Shifters U9 VCCA VCCB JP4 12V VCC50 VCC33 VHSMC VSC Santa Cruz Connector J3 J5 VCC33 SD Card Socket J7 EEPROM U10 Mictor Connector J2 USB U11 VCC50 Figure 3 14 THDB SUM board power distribution diagram ...

Page 24: ...yclone III start board To correctly operate the THDB SUM board with the Cyclone III start board users need to pay attention to the following notes 1 Observe the orientation of the HSMC connector when connecting the THDB SUM to the Cyclone III Starter Board 2 Users MUST short Pin 1 and Pin 2 of the JP3 on the THDB SUM to force the voltage level to 2 5V to match the 2 5V IO pins of the Cyclone III b...

Page 25: ...ion 23 close loop via R3 and HSMC_CLKIN_p2 n2 form a close loop via R4 Therefore using any one of the signal in a LVDS pair under single ended mode will prevent users from using the other signal in the same pair ...

Page 26: ...R 13 2009 Modify Figure 3 3 DEC 2 2009 Corrections for tables 3 1 3 7 Modify Ch 4 section 5 2 Always Visit THDB SUM Webpage for New Main board We will be continuing providing interesting examples and labs on our THDB SUM webpage Please visit www altera com or SUM terasic com for more information ...

Page 27: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Terasic P0006 ...

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