LN920 HW Design Guide
1VV0301730 Rev. 1
Page 23 of 81
2021-08-11
Not Subject to NDA
Pin
Signal
I/O
Function
Type
Comment
23
WOW#
O
Wake Host
1.8V /
3.3V
Open Drain
25
DPR
I
Dynamic Power Reduction
1.8V
26
GPS_DISABLE#
I
GPS disable
3.3V
Active Low
Internal PU
60
COEX3
I/O TBD
1.8V
62
COEX_UART_RX
I
TBD
1.8V
64
COEX_UART_TX
O
TBD
1.8V
67
RESET#
I
Reset Input
1.8V
Active Low
Internal PU
DIGITAL IO
38
GPIO11
I/O General Purpose I/O
1.8V
Audio
20
SCK_GPIO5
I/O
I2S_CLK
Can be configured as GPIO5
1.8V
22
DIN_GPIO6
I
I2S_DIN
Can be configured as GPIO6
1.8V
24
DOUT_GPIO7
O
I2S_DOUT
Can be configured as GPIO7
1.8V
28
WS_GPIO8
I/O
I2S_WS
Can be configured as GPIO8
1.8V
I2C Interface
56
SDA_GPIO9
I/O
I2C Data
Can be configured as GPIO9
1.8V
58
SCL_GPIO10
O
I2C Clock
Can be GPIO10
1.8V
Antenna Control
59
ANTCTL0_GPIO1
I/O
Antenna control0
Can be configured as GPIO1
1.8V
61
ANTCTL1_GPIO2
I/O
Antenna control1
Can be configured as GPIO2
1.8V
63
ANTCTL2_GPIO3
I/O
Antenna control2
Can be configured as GPIO3
1.8V
65
ANTCTL3_GPIO4
I/O
Antenna control3
Can be configured as GPIO4
1.8V
Power Supply