LN920 HW Design Guide
1VV0301730 Rev. 1
Page 13 of 81
2021-08-11
Not Subject to NDA
Note: On the host side, each of the CONFIG_0 to CONFIG_4 pins
require a pull-up resistor. Based on the configuration pins state on
the LN920, being tied to GND or lifted to No Connect (NC), the sensed
pins will create a 4-bit logic state.
For more details, please refer to PCI Express M.2 standard
specifications.
