JF2 Hardware User Guide
1vv0300985 Rev.4 2013-04-09
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Page 17 of 40
Mod. 0805 2011-07 Rev.2
6.
ROM2.2 Features
6.1.
SPI Flash Support
SPI flash provides external storage for features such as patches, SGEE, CGEE, broadcast
ephemeris data, and data logging.
This feature is only supported by the JF2 ROM2.2 variant.
6.1.1.
Hardware Interface
The SPI flash is connected through the following four GPIO pins
GPIO0 as MISO
GPIO1 as the SPI clock
GPIO3 as slave chip select
GPIO4 as MOSI
These four pins above form the standard SPI interface. The following features also use the
same GPIOs as the SPI flash interface, therefore, only one feature can be used at a time:
MEMS sensors
I2C EEPROM
Antenna sensing
Baud Rate Detection
The SPI interface clocking and data transport are completely controlled by software and are
not at a fixed rate.
Because of the methods used to access the SPI flash, the time required to store or retrieve data
in the device is highly variable
6.1.2.
Supported SPI Flash Chips
A limited number of SPI flash chips are supported by the firmware with the ROM 2.2 release.
The table below lists the supported SPI flash chips in ROM 2.2 devices.
Manufacturer Part Number
Storage Capacity
SST
SST25WF040
4Mb
SST
SST25WF020
2Mb
EON
EN25S40
4Mb
EON
EN25S20
2Mb
Table 2 Supported SPI Flash Chips in ROM 2.2
