Telit Wireless Solutions HE910 Hardware User'S Manual Download Page 84

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HE910 Hardware User Guide

1VV0300925 Rev. 32

Page

111

2019-11-25

13.

AUDIO SECTION OVERVIEW

The Audio of the HE910 Module is carried by DVI digital audio interface.

The audio port can be directly connected to end device using digital interface, or via one
of the several compliant codecs (in case an analog audio is needed).

Electrical Characteristics

The product is providing the Digital Audio Interface (DVI) on the following Pins:

13.1.1.

CODEC Examples

Please refer to the HE910 Digital Audio Application note

Digital Voice Interface (DVI)

PAD

Signal

I/O

Function

Note

Type

DVI_WA0

I/O

Digital Audio
Interface (Word
Alignment / LRCLK)

CMOS 1.8V

DVI_RX

Digital Audio
Interface (RX)

CMOS 1.8V

DVI_TX

Digital Audio
Interface (TX)

CMOS 1.8V

DVI_CLK

I/O

Digital Audio
Interface (BCLK)

CMOS 1.8V

Summary of Contents for HE910

Page 1: ... 01 2017 Mod 0805 2017 01 Rev 6 HE910 HW User Guide 1VV0300925 Rev 32 2019 11 25 ...

Page 2: ... for copyrighted material including the exclusive right to copy reproduce in any form distribute and make derivative works of the copyrighted material Accordingly any copyrighted material of Telit and its licensors contained herein or in the Telit products described in this instruction manual may not be copied reproduced distributed merged or modified in any manner without the express written perm...

Page 3: ...vities IV Trademarks TELIT and the Stylized T Logo are registered in Trademark Office All other product or service names are the property of their respective owners V Third Party Rights The software may include Third Party Right software In this case you agree to comply with all terms and conditions imposed on you in respect of such separate software In addition to Third Party Terms the disclaimer...

Page 4: ...de 1VV0300925 Rev 32 Page 4 of 111 2019 11 25 APPLICABILITY TABLE PRODUCTS HE910 HE910 D HE910 GL HE910 EUR HE910 EUD HE910 EUG HE910 NAR HE910 NAD HE910 NAG HE910 IS THE TYPE NAME OF THE PRODUCTS MARKETED AS HE910 G HE910 DG ...

Page 5: ...s Layout HE910 26 3 1 2 LGA Pads Layout HE910 D 27 3 1 3 LGA Pads Layout HE910 EUD EUR HE910 NAD NAR and HE910 GL 28 3 1 4 LGA Pads Layout HE910 EUG and HE910 NAG 29 4 HARDWARE COMMANDS 30 Turning ON the HE910 30 Turning OFF the HE910 35 HE910 Unconditional Shutdown 37 5 POWER SUPPLY 41 Power Supply Requirements 41 Power Consumption 42 General Design Rules 44 5 3 1 Electrical Design Guidelines 44 ...

Page 6: ...tenna Diversity Requirements 58 7 GPS RECEIVER 60 GPS Performances 60 GPS Signals Pinout 61 RF Front End Design 62 7 3 1 RF Signal Requirements 62 7 3 2 GPS Antenna Polarization 63 7 3 3 GPS Antenna Gain 64 7 3 4 Active versus Passive Antenna 64 7 3 5 GPS Antenna PCB Line Guidelines 65 7 3 6 RF Trace Losses 65 7 3 7 Implications of the Pre select SAW Filter 65 7 3 8 External LNA Gain and Noise Fig...

Page 7: ...ce availability 88 RTC Bypass out 89 External SIM Holder Implementation 89 VAUX Power Output 89 ADC Converter 90 14 8 1 Description 90 14 8 2 Using ADC Converter 90 15 MOUNTING THE HE910 ON THE APPLICATION 91 General 91 Module finishing dimensions 91 Recommended foot print for the application 93 Stencil 94 PCB pad design 94 PCB pad dimensions 95 Solder paste 97 15 7 1 HE910 Solder reflow 97 Packin...

Page 8: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 8 of 111 2019 11 25 ANATEL APPROVALS 108 17 DOCUMENT HISTORY 109 ...

Page 9: ...rt For general contact technical support services technical questions and report documentation errors contact Telit Technical Support at TS EMEA telit com TS AMERICAS telit com TS APAC telit com TS SRD telit com Alternatively use http www telit com support For detailed information about where you can buy the Telit modules or for recommendations on accessories and components visit http www telit co...

Page 10: ...failure or bodily injury may occur Caution or Warning Alerts the user to important points about integrating the module if these points are not followed the module and end user equipment may fail or malfunction Tip or Information Provides advice and suggestions that may be useful when integrating the module All dates are in ISO 8601 format i e YYYY MM DD ...

Page 11: ... Digital Voice Interface Application Note 80000NT10050A SPI Port Application Note 80000NT10053A Product description 80378ST10085A SIM Holder Design Guides 80000NT10001A USB HSIC Port Application Note 80000NT10071A AT Commands Reference Guide 80378ST10091A Telit EVK2 User Guide 1vv0300704 ...

Page 12: ...no responsibility is assumed by Telit Communications S p A for its use nor any infringement of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent rights of Telit Communications S p A other than for circuitry embodied in Telit products This document is subject to change without notice NOTE EN The integration of t...

Page 13: ...iver Asynchronous Serial Port USIF0 Prog Data HW Flow Control N15 C103 TXD I Serial data input from DTE CMOS 1 8V M15 C104 RXD O Serial data output to DTE CMOS 1 8V M14 C108 DTR I Input for DTR from DTE CMOS 1 8V L14 C105 RTS I Input for Request to send signal RTS from DTE CMOS 1 8V P15 C106 CTS O Output for Clear to Send signal CTS to DTE CMOS 1 8V N14 C109 DCD O Output for DCD to DTE CMOS 1 8V P...

Page 14: ...gnal CMOS 1 2V H15 HSIC_SLAVE_ WAKEUP I Slave Wake Up CMOS 1 8V Shared with SPI_MRDY F15 HSIC_HOST_W AKEUP O Host Wake Up CMOS 1 8V Shared with SPI CLK K15 HSIC_SUSPEN D_REQUEST O Slave Suspend Request CMOS 1 8V Shared with GPIO08 J15 HSIC_HOST_A CTIVE I Active Host Indication CMOS 1 8V Shared with SPI_SRDY D13 VDD_IO1 I VDD_IO1 Input To be connected to E13 E13 1V8_SEL O 1V8 SEL for VDD_IO1 To be ...

Page 15: ...V 16K pull down typical at 1 8V when in Input B6 DVI_RX I Digital Audio Interface RX 1 8V Input with 16K pull down typical at 1 8V B7 DVI_TX I O Digital Audio Interface TX 1 8V 16K pull down typical at 1 8V when in Input B8 DVI_CLK I O Digital Audio Interface CLK 1 8V Input with 16K pull down typical at 1 8V SPI D15 SPI_MOSI I SPI MOSI CMOS 1 8V Shared with TX_AUX E15 SPI_MISO O SPI_MISO CMOS 1 8V...

Page 16: ... CMOS 1 8V C11 GPIO_04 I O GPIO_04 CMOS 1 8V B14 GPIO_05 I O GPIO_05 CMOS 1 8V C12 GPIO_06 I O GPIO_06 CMOS 1 8V C13 GPIO_07 I O GPIO_07 CMOS 1 8V K15 GPIO_08 I O GPIO_08 CMOS 1 8V Shared with HSIC_SUSPE ND_REQUEST L15 GPIO_09 I O GPIO_09 CMOS 1 8V G15 GPIO_10 I O GPIO_10 CMOS 1 8V ADC B1 ADC_IN1 AI Analog Digital converter input A D Accepted values 0 to 1 2V DC RF SECTION K1 ANTENNA I O GSM EDGE ...

Page 17: ...wn 1 8V Active low R12 ON_OFF I Input command for power ON 1 8V Active low C14 VRTC I VRTC Backup capacitor Power backup for the embedded RTC supply 1 8V R11 VAUX PWRMO N O Supply Output for external accessories Power ON Monitor 1 8V Power Supply M1 VBATT Main power supply Baseband Power M2 VBATT Main power supply Baseband Power N1 VBATT_PA Main power supply Radio PA Power N2 VBATT_PA Main power s...

Page 18: ...nd Power H1 GND Ground Power J1 GND Ground Power L1 GND Ground Power A2 GND Ground Power E2 GND Ground Power F2 GND Ground Power G2 GND Ground Power H2 GND Ground Power J2 GND Ground Power K2 GND Ground Power L2 GND Ground Power R2 GND Ground Power M3 GND Ground Power N3 GND Ground Power P3 GND Ground Power R3 GND Ground Power D4 GND Ground Power ...

Page 19: ...4 GND Ground Power N5 GND Ground Power P5 GND Ground Power R5 GND Ground Power N6 GND Ground Power P6 GND Ground Power R6 GND Ground Power P8 GND Ground Power R8 GND Ground Power P9 GND Ground Power P10 GND Ground Power R10 GND Ground Power M12 GND Ground Power B13 GND Ground Power P13 GND Ground Power E14 GND Ground Power RESERVED ...

Page 20: ... RESERVED D2 RESERVED RESERVED B3 RESERVED RESERVED C3 RESERVED RESERVED D3 RESERVED RESERVED E3 RESERVED RESERVED F3 RESERVED RESERVED G3 RESERVED RESERVED H3 RESERVED RESERVED J3 RESERVED RESERVED K3 RESERVED RESERVED L3 RESERVED RESERVED B4 RESERVED RESERVED C4 RESERVED RESERVED B5 RESERVED RESERVED C5 RESERVED RESERVED C6 RESERVED RESERVED ...

Page 21: ...ED N9 RESERVED RESERVED A10 RESERVED RESERVED N10 RESERVED RESERVED N11 RESERVED RESERVED P11 RESERVED RESERVED B12 RESERVED RESERVED D12 RESERVED RESERVED N12 RESERVED RESERVED P12 RESERVED RESERVED F14 RESERVED RESERVED G14 RESERVED RESERVED H14 RESERVED RESERVED J14 RESERVED RESERVED K14 RESERVED RESERVED N13 RESERVED RESERVED L13 RESERVED RESERVED ...

Page 22: ...pins must not be connected J13 RESERVED RESERVED M13 RESERVED RESERVED K13 RESERVED RESERVED H13 RESERVED RESERVED G13 RESERVED RESERVED F13 RESERVED RESERVED B11 RESERVED RESERVED B10 RESERVED RESERVED A9 RESERVED RESERVED A8 RESERVED RESERVED D14 RESERVED RESERVED A14 RESERVED RESERVED ...

Page 23: ...sity Notes HE910 YES YES HE910 D NO YES Reserved Pads R7 R9 HE910 GL NO NO Reserved Pads F1 R7 R9 HE910 EUR NO NO Reserved Pads F1 R7 R9 HE910 EUD NO NO Reserved Pads F1 R7 R9 HE910 EUG YES NO Reserved Pads F1 HE910 NAR NO NO Reserved Pads F1 R7 R9 HE910 NAD NO NO Reserved Pads F1 R7 R9 HE910 NAG YES NO Reserved Pads F1 HE910 is the type name of the products marketed as HE910 G HE910 DG ...

Page 24: ... J2 K2 L2 R 2 M3 N3 P3 R3 D4 M4 N4 P4 R4 N5 P5 R5 N 6 P6 R6 P8 R8 P9 P10 R10 M12 B13 P13 E1 4 GND R12 ON OFF R13 HW_ SHUTDOWN B15 USB_D If not used should be connected to a Test Point or an USB connector C15 USB_D If not used should be connected to a Test Point or an USB connector D15 TXD_AUX If not used should be connected to a Test Point E15 RXD_AUX If not used should be connected to a Test Poin...

Page 25: ...disabled by the related AT Command AT RXDIV please refer to the At User guide for the related syntax R9 ANT_GPS if supported by the product If the GPS is not used it could be left unconnected RTS pin should be connected to the GND on the module side if flow control is not used The above pins are also necessary to debug the application when the module is assembled on it so we recommend connecting t...

Page 26: ...N A_EN 8 RES DVI_CLK GPIO_01 RES GND GND 9 RES DVI_WA0 GPIO_02 RES GND ANT_GP S 10 RES RES GPIO_03 RES GND GND 11 HSIC_U SB_ST RB RES GPIO_04 RES RES VAUX P WRMON 12 HSIC_U SB_DA TA RES GPIO_06 RES GND RES RES ON_OFF 13 VUSB GND GPIO_07 VDD_IO1 1V8_SEL RES RES RES RES RES RES RES RES GND HW_SHU TDOWN 14 RES GPIO_05 VRTC RES GND RES RES RES RES RES C105 RT S C108 DT R C109 DC D C107 DS R C125 RIN G...

Page 27: ... GND GND 7 SIMRST DVI_TX RES RES RES RES 8 RES DVI_CLK GPIO_01 RES GND GND 9 RES DVI_WA0 GPIO_02 RES GND RES 10 RES RES GPIO_03 RES GND GND 11 HSIC_U SB_ST RB RES GPIO_04 RES RES VAUX P WRMON 12 HSIC_U SB_DA TA RES GPIO_06 RES GND RES RES ON_OFF 13 VUSB GND GPIO_07 VDD_IO1 1V8_SEL RES RES RES RES RES RES RES RES GND HW_SHU TDOWN 14 RES GPIO_05 VRTC RES GND RES RES RES RES RES C105 RT S C108 DT R C...

Page 28: ...DVI_RX RES GND GND GND 7 SIMRST DVI_TX RES RES RES RES 8 RES DVI_CLK GPIO_01 RES GND GND 9 RES DVI_WA0 GPIO_02 RES GND RES 10 RES RES GPIO_03 RES GND GND 11 HSIC_U SB_ST RB RES GPIO_04 RES RES VAUX P WRMON 12 HSIC_U SB_DA TA RES GPIO_06 RES GND RES RES ON_OFF 13 VUSB GND GPIO_07 VDD_IO1 1V8_SEL RES RES RES RES RES RES RES RES GND HW_SHU TDOWN 14 RES GPIO_05 VRTC RES GND RES RES RES RES RES C105 RT...

Page 29: ...GND GND 7 SIMRST DVI_TX RES RES RES GPS_LN A_EN 8 RES DVI_CLK GPIO_01 RES GND GND 9 RES DVI_WA0 GPIO_02 RES GND ANT_GP S 10 RES RES GPIO_03 RES GND GND 11 HSIC_U SB_ST RB RES GPIO_04 RES RES VAUX P WRMON 12 HSIC_U SB_DA TA RES GPIO_06 RES GND RES RES ON_OFF 13 VUSB GND GPIO_07 VDD_IO1 1V8_SEL RES RES RES RES RES RES RES RES GND HW_SHU TDOWN 14 RES GPIO_05 VRTC RES GND RES RES RES RES RES C105 RT S...

Page 30: ... line it is internally pulled up Using pull up resistor may bring to latch up problems on the HE910 power regulator and improper power on off of the module The line ON_OFF must be connected only in open collector or open drain configuration NOTE In this document all the lines that are inverted hence have active low signals are labelled with a name that ends with or with a bar over the name TIP To ...

Page 31: ...111 2019 11 25 A flow chart showing the proper turn on procedure is displayed below Modem ON Proc START Y Y GOTO HW SHUTDOWN unconditional GOTO Start AT CMD N PWMON ON PWMON ON N Delay 1s ON_OFF LOW Delay 5 Sec ON_OFF HIGH Modem ON Proc END VBATT 3 22V Y N ...

Page 32: ... NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the HE910 when the module is powered off or during an ON OFF transition AT answer in 1 sec N Y Start AT CMD START DELAY 300msec Enter AT CR Start AT CMD END GOTO HW SHUTDOWN unconditional GOTO Modem ON Proc ...

Page 33: ...N_OFF pad with a totem pole output of a 3 5 V microcontroller uP_OUT1 Figure 4 2 Turning ON the HE910 2 2 Let s assume you need to drive the ON_OFF pad directly with an ON OFF button Figure 4 3 ON the HE910 3 Warning It is recommended to set the ON_OFF line LOW to power on the module only after VBATT is higher than 3 22V ...

Page 34: ...ondition it is not satisfied you could use the HW_SHUTDOWN line to recover it and then restart the power on activity using the ON_OFF line An example of this is described in the following diagram After HW_SHUTSDOWN is released you could again use the ON_OFF line to power on the module ...

Page 35: ...hat the device will not be reachable any more To turn OFF the HE910 the pad ON_OFF must be tied low for at least 3 seconds and then released TIP To check if the device has been powered off the hardware line PWRMON must be monitored The device is powered off when PWRMON goes low NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to th...

Page 36: ... 2019 11 25 The following flow chart shows the proper turn off procedure Modem OFF Proc START AT Y N PWMON ON OFF Mode ON_OFF LOW Delay 3 Sec ON_OFF HIGH Modem OFF Proc END PWRMON ON Y N Key AT SHDN GOTO HW Shutdown Unconditional Looping for more than 15s Y N ...

Page 37: ...eased NOTE Do not use any pull up resistor on the HW_SHUTDOWN line nor any totem pole digital output Using pull up resistor may bring to latch up problems on the HE910 power regulator and improper functioning of the module The line HW_SHUTDOWN must be connected only in open collector configuration The HW_SHUTDOWN is generating an unconditional shutdown of the module without an automatic restart Th...

Page 38: ...t us assume you need to drive the HW_SHUTDOWN pad with a totem pole output of a 3 5 V microcontroller uP_OUT2 Figure 4 5 Tipical circuit 2 NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the HE910 when the module is powered off or during an ON OFF transition ...

Page 39: ...ev 32 Page 39 of 111 2019 11 25 In the following flow chart is detailed the proper restart procedure HW SHUTDOWN Unconditional START HW_SHDN LOW Delay 200ms HW_SHDN HIGH PWRMON ON Delay 1s Y N Disconnect VBATT HW SHUTDOWN Unconditional END ...

Page 40: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 40 of 111 2019 11 25 ...

Page 41: ...Voltage 3 8 V Normal Operating Voltage Range 3 40 V 4 20 V Extended Operating Voltage Range 3 10 V 4 50 V NOTE The Operating Voltage Range MUST never be exceeded care must be taken when designing the application s power supply section to avoid having an excessive voltage drop If the voltage drop is exceeding the limits it could cause a Power Off of the module The Power supply must be higher than 3...

Page 42: ...nality with power saving DRX7 Module registered on the network can receive incoming calls and SMS IDLE mode GSM EDGE AT CFUN 1 19 Normal mode full functionality of the module AT CFUN 4 16 5 Disabled TX and RX module is not registered on the network AT CFUN 5 0 8 Full functionality with power saving DRX9 1 3mA in case of DRX5 Operative mode WCDMA WCDMA Voice 152 WCDMA voice call TX 10dBm WCDMA HSDP...

Page 43: ... of the PCB is not well designed a strong noise floor is generated on the ground and the supply this will reflect on all the audio paths producing an audible annoying noise at 216 Hz if the voltage drop during the peak current absorption is too much then the device may even shutdown as a consequence of the supply voltage drop NOTE The electrical design for the Power supply should be made ensuring ...

Page 44: ...elines The desired output for the power supply is 3 8V hence there s not a big difference between the input source and the desired output and a linear regulator can be used A switching power supply will not be suited because of the low drop out requirements When using a linear regulator a proper heat sink shall be provided in order to dissipate the power generated A Bypass low ESR capacitor of ade...

Page 45: ...switching regulator a 500kHz or more switching frequency regulator is preferable because of its smaller inductor size and its faster transient response This allows the regulator to respond quickly to the current peaks absorption In any case the frequency and Switching design selection is related to the application to be developed due to the fact the switching frequency could also generate EMC inte...

Page 46: ...e maximum voltage for the HE910 and damage it NOTE DON T USE any Ni Cd Ni MH and Pb battery types directly connected with HE910 Their use can lead to overvoltage on the HE910 and damage it USE ONLY Li Ion battery types A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks a 100μF tantalum capacitor is usually suited Make sure the low ESR capa...

Page 47: ... of time let s say few minutes and then remains for a quite long time in idle let s say one hour then the power supply has always the time to cool down between the calls and the heat sink could be smaller than the calculated one for 600mA maximum RMS current or even could be the simple chip package no heat sink Moreover in the average network conditions the device is requested to transmit at a low...

Page 48: ...eason while a voltage drop of 300 400 mV may be acceptable from the power loss point of view the same voltage drop may not be acceptable from the noise point of view If your application doesn t have audio interface but only uses the data feature of the Telit HE910 then this noise is not so disturbing and power supply layout design can be more forgiving The PCB traces to the HE910 and the Bypass ca...

Page 49: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 49 of 111 2019 11 25 The below figure shows the recommended circuit Figure 5 3 Circuit ...

Page 50: ... 850 GSM 900 PCS 1900 HE910 D GSM 850 GSM 900 DCS1800 PCS 1900 FDD B1 B2 B4 B5 B8 FDD B1 B2 B5 B8 GSM 850 GSM 900 PCS 1900 HE910 GL GSM 850 GSM 900 DCS1800 PCS 1900 FDD B1 B2 B4 B5 B8 NO HE910 EUR GSM 850 GSM 900 DCS1800 PCS 1900 FDD B1 B5 B8 NO HE910 EUD GSM 850 GSM 900 DCS1800 PCS 1900 FDD B1 B5 B8 NO HE910 EUG GSM 850 GSM 900 DCS1800 PCS 1900 FDD B1 B5 B8 NO HE910 NAR GSM 850 GSM 900 DCS1800 PC...

Page 51: ... Class E2 0 4W WCDMA FDD B1 B2 B4 B5 B8 Class 3 0 25W Sensitivity Band Typical without Diversity Note GSM 850 109 5 dBm BER Class II 2 44 GSM 900 109 dBm BER Class II 2 44 DCS1800 110 dBm BER Class II 2 44 PCS 1900 109 5 dBm BER Class II 2 44 WCDMA FDD B1 111 dBm BER 0 1 WCDMA FDD B2 110 dBm BER 0 1 WCDMA FDD B4 111 dBm BER 0 1 WCDMA FDD B5 111 dBm BER 0 1 WCDMA FDD B8 110 dBm BER 0 1 ...

Page 52: ...le antenna for that those band s Bandwidth GSM EDGE 70 MHz in GSM850 80 MHz in GSM900 170 MHz in DCS 140 MHz PCS band Bandwidth WCDMA 70 MHz in WCDMA Band V 80 MHz in WCDMA Band VIII 460 MHz in WCDMA Band IV 140 MHz in WCDMA Band II 250 MHz in WCDMA Band I Impedance 50 ohm Input power 33dBm 2 W peak power in GSM 24dBm Average power in WCDMA VSWR absolute max 10 1 limit to avoid permanent damage VS...

Page 53: ...n conditions for satisfying RF exposure compliance Antennas used for this OEM module must not exceed the gains for mobile and fixed operating configurations as described in FCC IC Regulatory notices chapter GSM WCDMA PCB line Guidelines Make sure that the transmission line s characteristic impedance is 50ohm Keep line on the PCB as short as possible since the antenna line loss shall be less than a...

Page 54: ...the antenna line far away from the HE910 power supply lines If EM noisy devices are present on the PCB hosting the HE910 such as fast switching ICs take care of the shielding of the antenna line by burying it inside the layers of PCB and surround it with Ground planes or shield it with a metal frame cover If EM noisy devices are not present around the line the use of geometries like Microstrip or ...

Page 55: ...Coplanar Waveguide G CPW line has been chosen since this kind of transmission line ensures good impedance control and can be implemented in an outer PCB layer as needed in this case A SMA female connector has been used to feed the line The interface board is realized on a FR4 4 layers PCB Substrate material is characterized by relative permittivity εr 4 6 0 4 1 GHz TanD 0 019 0 026 1 GHz A charact...

Page 56: ...a SMA connector has been soldered to the board in order to characterize the losses of the transmission line including the connector itself During Return Loss impedance measurements the transmission line has been terminated to 50 Ω load Return Loss plot of line under test is shown below Figure 6 2 Return Loss Plot Line input impedance in Smith Chart format once the line has been terminated to 50 Ω ...

Page 57: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 57 of 111 2019 11 25 Insertion Loss of G CPW line plus SMA connector is shown below Figure 6 4 Loss of G CPW ...

Page 58: ...d Antenna Diversity ANTENNA REQUIREMENTS Frequency range Depending by frequency band s provided by the network operator the customer shall use the most suitable antenna for that those band s Bandwidth GSM EDGE 70 MHz in GSM850 80 MHz in GSM900 140 MHz PCS band Bandwidth WCDMA 70 MHz in WCDMA Band V 80 MHz in WCDMA Band VIII 140 MHz in WCDMA Band II 250 MHz in WCDMA Band I Impedance 50 ohm When usi...

Page 59: ...5 NOTE 1 The Diversity is not supported on DCS 1800 in 2G and FDD BAND IV in 3G NOTE If the RX Diversity is not used connected disable the Diversity functionality using the AT RXDIV command ref to the AT User guide for the proper syntax and leave the pad F1 unconnected ...

Page 60: ...ues of better than 165 dBm as is required for indoor applications The following table is listing the HE910 variants that support the GPS receiver Product GPS Receiver HE910 YES HE910 D NO HE910 GL NO HE910 EUR NO HE910 EUD NO HE910 EUG YES HE910 NAR NO HE910 NAD NO HE910 NAG YES GPS Performances Advanced real time hardware correlation engine for enhanced sensitivity better than 165 dBm for A GPS F...

Page 61: ...cking mode 166 dBm GPS Accuracy 3m TTFF from Cold Start 42 sec TTF from Warm Start 30sec TTF from Hot Start 1 8 sec Power Consumption in Acquisition 46 4 mA 3 8V Power Consumption in Tracking 37 8 mA 3 8V Power Consumption in Low Power Tracking 25 7 mA 3 8V GPS Signals Pinout The Pads related to this function are the following PAD Signal I O Function Type R9 ANT_GPS I GPS Antenna 50 ohm RF R7 GPS_...

Page 62: ...blockage such as foliage or building Multipath caused by signal reflection GPS antenna Signal path after the GPS antenna The first three items in the list above are specified in IS GPS 200E readily available multiple sources online IS GPS 200E specifies a signal level minimum of 130 dBm will be presented to the receiver when using a linearly polarized antenna with 3 dBi gain The GPS signal is rela...

Page 63: ... power level with a linearly polarized antenna A linearly polarized antenna will have 3 dB loss as compared to an RHCP antenna assuming the same antenna gain specified in dBi and dBic respectively An RHCP antenna is better at rejecting multipath than a linearly polarized antenna This is because the reflected signal changes polarization to LHCP which would be rejected by the RHCP antenna by typical...

Page 64: ...f 5 dBiC at azimuth and an LNA gain of 20 dB for a combined total of 25 dB Antenna Y has an antenna gain of 5 dBiC at azimuth and an LNA gain of 30 dB for a combined total of 25 dB However in the system antenna X will outperform antenna Y by about 10 dB refer to next chapter for more details on system noise floor An antenna with higher gain will generally outperform an antenna with lower gain Once...

Page 65: ...ables or RF simulation software to estimate what the losses would be A good rule of thumb would be to keep the RF traces as short as possible make sure they are 50 ohms impedance and don t contain any sharp bends 7 3 7 Implications of the Pre select SAW Filter The HE910 module contains a SAW filter used in a pre select configuration with the built in LNA that is the RF input of the HE910 ties dire...

Page 66: ...ch higher levels The amplifier needs to stay in the linear region when presented with these other signals Again the system designer needs to determine all of the unintended signals and their possible levels that can be presented and make sure the external LNA will not be driven into compression If this were to happen the GPS signal itself would start to be attenuated and the GPS performance would ...

Page 67: ...f the RF path The antenna cannot be shielded because then it can t receive the GPS signals There are two solutions one is to move the antenna away from the source of interference or the second is to shield the digital interference to prevent it from getting to the antenna 7 3 12 GPS Antenna Installation The HE910 due to its characteristics of sensitivity is capable to perform a Fix inside the buil...

Page 68: ...evel on any digital pin CMOS 1 8 with respect to ground 0 3V 2 1V Input level on any digital pin CMOS 1 2 with respect to ground 0 3V 1 4V Operating Range Interface levels 1 8V CMOS Level Min Max Input high level 1 5V 1 9V Input low level 0V 0 35V Output high level 1 6V 1 9V Output low level 0V 0 2V Operating Range Interface levels 1 2V CMOS Level Min Max Input high level 0 9V 1 3V Input low level...

Page 69: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 69 of 111 2019 11 25 Current characteristics Level Typical Output Current 1mA Input Current 1uA ...

Page 70: ...but only as an emergency exit in the rare case the device remains stuck waiting for some network response The HW_SHUTDOWN is internally controlled on start up to achieve always a proper power on reset sequence so there s no need to control this pin on start up It may only be used to reset a device already on that is not responding to any command NOTE Do not use this signal to power off the HE910 U...

Page 71: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 71 of 111 2019 11 25 ...

Page 72: ...race lengths number of vias and capacitive loading should be minimized The characteristic impedance value should be as close as possible to 90 Ohms differential In case there is a need to add an ESD protection the suggested connection is the following Figure 9 1 ESD8V0L2B 03L NOTE VUSB pin should be disconnected before activating the Power Saving Mode In case of a Firmware upgrade using the USB po...

Page 73: ...upplies the clock The following table is listing the available signals The signal 1V8_SEL must be connected to the VDD_IO1 input pin to properly supply this digital section NOTE Due to the shared functions when the SPI port is used it is not possible to use the AUX_UART port SPI Connections PAD Signal I O Function Type COMMENT D15 SPI_MOSI I SPI MOSI CMOS 1 8V Shared with TX_AUX E15 SPI_MISO O SPI...

Page 74: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 74 of 111 2019 11 25 Figure 10 1 SPI Connections ...

Page 75: ...pply this digital section For the detailed use of USB HSIC port please refer to the related Application Note PAD Signal I O Function Type COMMENT A12 HSIC_USB_DATA I O USB HSIC data signal CMOS 1 2V A11 HSIC_USB_STRB I O USB HSIC strobe signal CMOS 1 2V H15 HSIC_SLAVE_WAKEUP I Slave Wake Up CMOS 1 8V Shared with SPI_MRDY F15 HSIC_HOST_WAKEUP O Host Wake Up CMOS 1 8V Shared with SPI CLK K15 HSIC_SU...

Page 76: ...5 NOTE Due to the shared functions when the USB_HSIC port is used it is not possible to use the SPI and the GPIO_08 The USB_HSIC is not active by default but it has to be enabled using the AT PORTCFG command refer to the AT User guide for the detailed syntax description ...

Page 77: ...eive Transmit microcontroller UART 5V or other voltages different from 1 8V Depending from the type of serial port on the OEM hardware a level translator circuit may be needed to make the system work The electrical characteristics of the Serial ports are explained in the following tables Absolute Maximum Ratings Not Functional Parameter Min Max Input level on any digital pin CMOS 1 8 with respect ...

Page 78: ...it line see Note Output transmit line of HE910 UART 3 C103 TXD N15 Receive line see Note Input receive of the HE910 UART 4 C108 DTR M14 Data Terminal Ready Input to the HE910 that controls the DTE READY condition 5 GND M12 B13 P13 E14 Ground Ground 6 C107 DSR P14 Data Set Ready Output from the HE910 that indicates the module is ready 7 C106 CTS P15 Clear to Send Output from the HE910 that controls...

Page 79: ...de RESET Schottky diode POWER SAVING 5K to 12K 1V8 The input line ON_OFF and RESET state can be treated as in picture below Figure 12 1 Input Line ON_OFF NOTE According to V 24 some signal names are referred to the application side therefore on the HE910 side these signal are on the opposite direction TXD on the application side will be connected to the receive line here named C103 TXD RXD on the ...

Page 80: ...RXD lines can be connected the other lines can be left open provided a software flow control is implemented NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the HE910 when the module is powered off or during an ON OFF transition ...

Page 81: ...ort NOTE Due to the shared pins when the Modem Serial port is used it is not possible to use the SPI functions NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the HE910 when the module is powered off or during an ON OFF transition PAD Signal I O Function Type COMMENT D15 TX_AUX O Auxiliary UART TX Data to DT...

Page 82: ...ranslation is always required The simplest way to translate the levels and invert the signal is by using a single chip level translator There are a multitude of them differing in the number of drivers and receivers and in the levels be sure to get a true RS232 level translator not a RS485 or other standards By convention the driver is the level translator from the 0 1 8V UART to the RS232 level Th...

Page 83: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 83 of 111 2019 11 25 The RS232 serial port lines are usually connected to a DB9 connector with the following layout Figure 12 3 RS232 serial port lines ...

Page 84: ...se an analog audio is needed Electrical Characteristics The product is providing the Digital Audio Interface DVI on the following Pins 13 1 1 CODEC Examples Please refer to the HE910 Digital Audio Application note Digital Voice Interface DVI PAD Signal I O Function Note Type B9 DVI_WA0 I O Digital Audio Interface Word Alignment LRCLK CMOS 1 8V B6 DVI_RX I Digital Audio Interface RX CMOS 1 8V B7 DV...

Page 85: ...the available GPIO on the HE910 PAD Signal I O Function Type Drive strength Default State Note C8 GPIO_01 I O Configurable GPIO CMOS 1 8V 1 mA INPUT Alternate function STAT LED C9 GPIO_02 I O Configurable GPIO CMOS 1 8V 1 mA INPUT C10 GPIO_03 I O Configurable GPIO CMOS 1 8V 1 mA INPUT C11 GPIO_04 I O Configurable GPIO CMOS 1 8V 1 mA INPUT B14 GPIO_05 I O Configurable GPIO CMOS 1 8V 1 mA INPUT C12 ...

Page 86: ...tions used in the HE910 interface circuits Absolute Maximum Ratings Not Functional Parameter Min Max Input level on any digital pin CMOS 1 8 with respect to ground 0 3V 2 1V Operating Range Interface levels 1 8V CMOS Level Min Max Input high level 1 5V 1 9V Input low level 0V 0 35V Output high level 1 6V 1 9 Output low level 0V 0 2V G15 GPIO_10 I O Configurable GPIO CMOS 1 8V 1 mA INPUT VDD_IO1 ha...

Page 87: ...ad has interface levels different from the 1 8V CMOS then it can be buffered with an open collector transistor with a 47K pull up to 1 8V NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the HE910 when the module is powered off or during an ON OFF transition Using a GPIO Pad as OUTPUT The GPIO pads when used ...

Page 88: ...odules the STAT_LED needs an external transistor to drive an external LED Therefore the status indicated in the following table is reversed with respect to the pin status Device Status LED status Device off Permanently off Not Registered Permanently on Registered in idle Blinking 1sec on 2 sec off Registered in idle power saving It depends on the event that triggers the wakeup In sync with network...

Page 89: ...p circuit to the related VRTC signal pad C14 on module s Pinout For additional details on the Backup solutions please refer to the related application note xE910 RTC Backup Application Note External SIM Holder Implementation Please refer to the related User Guide SIM Holder Design Guides 80000NT10001a VAUX Power Output A regulated power supply output is provided in order to supply small devices fr...

Page 90: ... The following table is showing the ADC characteristics Min Typical Max Units Input Voltage range 0 1 2 Volt AD conversion 10 bits Input Resistance 1 Mohm Input Capacitance 1 pF The input line is named as ADC_IN1 and it is available on Pad B1 14 8 2 Using ADC Converter An AT command is available to use the ADC function The command is AT ADC 1 2 The read value is expressed in mV Refer to SW User Gu...

Page 91: ... HE910 ON THE APPLICATION General The HE910 modules have been designed in order to be compliant with a standard lead free SMT process Module finishing dimensions Figure 15 1 Module finishing Pin B1 Dimensions in mm Bottom view Lead free Alloy Surface finishing Ni Au for all solder pads ...

Page 92: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 92 of 111 2019 11 25 Figure 15 2 Module dimensions ...

Page 93: ... the HE910 is suggested to consider on the application a 1 5 mm placement inhibit area around the module It is also suggested as common rule for an SMT component to avoid having a mechanical part of the application in direct contact with the module NOTE In the customer application the region under WIRING INHIBIT see figure above must be clear from signal or ground paths ...

Page 94: ...s layout can be the same of the recommended footprint 1 1 we suggest a thickness of stencil foil 120 µm PCB pad design Non solder mask defined NSMD type is recommended for the solder pads on the PCB Figure 15 4 PCB PCB Copper Pad Pad Solder Mask SMD Solder Mask Defined NSMD Non Solder Mask Defined ...

Page 95: ...ware User Guide 1VV0300925 Rev 32 Page 95 of 111 2019 11 25 PCB pad dimensions The recommendation for the PCB pads dimensions are described in the following image dimensions in mm Figure 15 5 PCB pads dimensions ...

Page 96: ...ayer thickness µm Properties Electro less Ni Immersion Au 3 7 0 05 0 15 good solder ability protection high shear force values The PCB must be able to resist the higher temperatures which are occurring at the lead free process This issue should be discussed with the PCB supplier Generally the wettability of tin lead solder paste on the described surface plating is better compared to lead free sold...

Page 97: ...5 7 1 HE910 Solder reflow Recommended solder reflow profile Figure 15 7 HE910 Solder reflow Warning The above solder reflow profile represents the typical SAC reflow limits and does not guarantee adequate adherence of the module to the customer application throughout the temperature range Customer must optimize the reflow profile depending on the overall system taking into account such factors as ...

Page 98: ...me min to max ts 150 C 200 C 60 180 seconds Tsmax to TL Ramp up Rate 3 C second max Time maintained above Temperature TL Time tL 217 C 60 150 seconds Peak Temperature Tp 245 0 5 C Time within 5 C of actual Peak Temperature tp 10 30 seconds Ramp down Rate 6 C second max Time 25 C to Peak Temperature 8 minutes max NOTE All temperatures refer to topside of the package measured on the package body sur...

Page 99: ...5 Rev 32 Page 99 of 111 2019 11 25 Warning The HE910 module withstands one reflow process only Packing system Tray The HE910 modules are packaged on trays of 36 pieces each These trays can be used in SMT processes for pick place handling ...

Page 100: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 100 of 111 2019 11 25 Figure 15 8 Packing system 1 ...

Page 101: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 101 of 111 2019 11 25 Figure 15 9 Packing system 2 ...

Page 102: ...2 Page 102 of 111 2019 11 25 Packing System Reel The HE910 can be packaged on reels of 200 pieces each See figure for module positioning into the carrier Figure 15 10 Packing System 3 15 9 1 Carrier Tape Detail Figure 15 11 Carrier tape detail ...

Page 103: ...HE910 Hardware User Guide 1VV0300925 Rev 32 Page 103 of 111 2019 11 25 15 9 2 Reel Detail Figure 15 12 Reel detail 1 Figure 15 13 Reel detail 2 ...

Page 104: ...as to take care of the following conditions a Calculated shelf life in sealed bag 12 months at 40 C and 90 relative humidity RH b Environmental condition during the production 30 C 60 RH according to IPC JEDEC J STD 033A paragraph 5 c The maximum time between the opening of the sealed bag and the reflow process must be 168 hours if condition b IPC JEDEC J STD 033A paragraph 5 2 is respected d Baki...

Page 105: ...ng carefully the instruction for its use Do not insert or remove the SIM when the product is in power saving mode The system integrator is responsible of the functioning of the final product therefore care has to be taken to the external components of the module as well as of any project or installation issue because the risk of disturbing the GSM network or external devices or having impact on th...

Page 106: ...luding interference that may cause undesired operation of the device Le présent appareil est conforme aux CNR d Industrie Canada applicables aux appareils radio exempts de licence L exploitation est autorisée aux deux conditions suivantes 1 l appareil ne doit pas produire de brouillage et 2 l utilisateur de l appareil doit accepter tout brouillage radioélectrique subi même si le brouillage est sus...

Page 107: ...suant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not o...

Page 108: ... Hardware User Guide 1VV0300925 Rev 32 Page 108 of 111 2019 11 25 ANATEL APPROVALS ANATEL Homologation 03120 11 02618 Applicable to the below listed variants HE910 HE910 D HE910 GL HE910EUD HE910EUR HE910EUG ...

Page 109: ... to Main and AUX serial ports Updated IO logic levels Updated module s mechanical drawing IO levels selection 1 8 1 2 removed now only 1 8 7 2012 01 16 Added HE910 GA and D added Conformity assessment chapter 8 2012 02 03 Chapter 5 1 updated 9 2012 02 07 Chapter 4 2 updated 10 2012 03 16 Added ADC in pinout description added GPS specification updated Chapter 13 and 14 11 2012 03 26 Chapter 2 1 2 1...

Page 110: ...2013 08 30 Updated Chapter 3 1 4 1 5 2 5 3 3 8 9 1 11 13 1 24 2013 12 20 Updated Chapter 4 1 4 2 5 3 1 1 5 3 1 2 8 added USB_HSIC Updated the Stat Led schematic example updated packaging tray drawing added PCB Guidelines for FCC 25 2015 03 03 Add new product HE910 GL 26 2015 04 09 Removed product HE910 GA 27 2015 05 25 Updated Chapter 15 8 Packing system Tray 28 2015 09 03 Updated Chapter 6 1 on H...

Page 111: ... 01 2017 Mod 0805 2017 01 Rev 6 ...

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