Tektronix P6417, Instructions Manual

Page: 22 / 40

Maintenance
12
P4617 & P6418 Logic Analyzer Probe Instructions
Perform the following steps to complete the probe functional verification
procedure:
1. Ensure that the jumper at J15 on the adjustment/verification fixture is in the
INT position to select the internal 50.065 MHz clock.
2. Open the Setup window for the LA module which will be used to test the
probes.
3. Click the Set Thresholds button to display the Probe Threshold dialog box.
4. Adjust the threshold level to 700 mV for all channels.
5. Connect the acquisition probe to be tested to the C3/C2 channel group on the
LA module.
6. Refer to Figure 8 and connect the podlets of the acquisition probe to J1 and
J2 on the adjustment/verification fixture. Ensure that you connect the ground
side of the podlets to the ground side of the adjustment/verification fixture
connectors.
7. Connect the single clock (CK n) or the qualifier (Q n) channel to one of the
J3 CLK OUT connector pairs on the adjustment/verification fixture.
8. Return to the Setup window and click the Show Activity button to display
the Activity Monitor.
9. Verify that the Activity Monitor shows activity on all probe channels
connected to the test fixture.
Figure 9 shows an example of the Activity Monitor. Note the signal activity
for clock CK3 and data channels for the C3(7-0) and C2(7-0) groups. Also
note that there is no activity on the other groups because the probe podlets
are not connected to a signal source (the channels are all high).