Tektronix 82A04B, User Manual

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Speci fi cations
Table 4: Mainframe system timebase
Characteristics Description
Mainframe horizontal
modes Free Run and Triggered Modes are supported
Mainframe sampling
rate, phase corrected
modes DC to 180 kHz maximum, one channel. If the
trigger rate is less than the maximum, or the
requested holdoff exceeds the minimum, then the
trigger rate and / or holdoff will dictate sampling
rate.
Mainframe horizontal
position range Range is determined by the following formula
where (f) equals the frequency of the reference
clock
Mainframe timing
accuracy, free run
phase corrected mode Maximum timing deviation 0.1% of phase
reference signal period, typical, relative to phase
reference signal
Assumes that phase reference frequency has
been correctly entered. Operation of phase
reference clock at frequencies requiring extended
bandwidth or signal conditioning may require an
instrument option.
Mainframe timing
accuracy, triggered
phase corrected mode Maximum timing deviation relative to phase
reference signal:
0.2% of the phase reference signal period
typical for measurements made >40 ns after
trigger event
0.4% of the phase reference signal period
typical for measurements made ≤ 40 ns after
the trigger event
Assumes that phase reference frequency
has been correctly entered
Mainframe horizontal
deskew range and
resolution Operating in Triggered Phase Corrected modes:
-500 ps to +100 ns on any individual channel in
1 ps increments
Operating in Free Run Phase Corrected modes:
Deskew range extends over the full clock cycle
of the phase reference
12 82A04B User Manual