21
DPL 3519A DOLBY SURROUND PROLOGIC IC.
The DPL 3519A processor is designed to decode Dolby encoded surround sound. The IC integrates the complete
Dolby Surround Pro Logic decoding on chip without any necessary external circuitry. The DPL 3519A is designed as
a coprocessor to the MSP family. Together with the MSP, a TV set with up to six outputs (L,R,C,SUB,SL,SR) can be
developed together with headphones and several line outputs.
Features:
n
Full Dolby Surround Pro Logic Adaptive Matrix
n
Pseudo-surround mode for signals not encoded in Dolby Surround
n
PANORAMA sound mode (3-D Surround sound via 2 loudspeakers)
n
Noise sequencer
n
Automatic input balance control
n
7 kHz low-pass filter
n
100 Hz low-pass filter for subwoofer
n
Modified Dolby B-type NR decoder
n
30 ms surround delay according to table created by Dolby Laboratories (1 ms steps)
n
2 I²S input channels (e.g. MSP and DRPA)
n
2 I²S output channels, freely programmable with sound channels L/R (resp. L _ C/R _ C), C/S, Sub or I²S input
n
Mode control: normal/phantom/wide/three channel/center off/panorama sound/stereo bypass
n
Surround matrix mode control: adaptive/passive/effect
n
Additional surround basewidth effect
n
Reverberation of surround signals
n
2 digital input/output pins
n
1 digital input pin
n
Master volume control in dB units
n
Level Trim for L, C, R, S in dB units, _ 12 dB
n
Identical treble/bass/loudness function for L, C, R, S
n
Separate volume control for two surround outputs
n
Additional line output for HIFI receiver connection (SCART output). Volume for this output is in dB units.
n
3 pairs of D/A converters
n
Scart switches
PINNING
1.
NC
Not connected
2.
NC
Not connected
3.
NC
Not connected
4.
I²S_DA_IN1
I²S1 data input
5.
I²S_DA_OUT1
I²S1 data output
6.
I²S_WS
I²S wordstrobe
7.
I²S_CL
I²S clock
8.
I²C_DA
I²C data
9.
I²C_CL
I²C clock
10.
NC
Not connected
11.
STANDBYQ
Standby (low-active)
12.
ADR_SEL
I²C-Bus address select
13.
D_CTR_IO0
Digital control IO 0
14.
D_CTR_IO1
Digital control IO 1
15.
NC
Not connected
16.
NC
Not connected
17.
NC
Not connected
18.
AUD_CL_OUT
Audio clock output
19.
D_CTR_IN
Digital control input
20.
XTAL_OUT
Crystal oscillator
21.
XTAL_IN
Crystal oscillator
22.
TESTEN
Test pin
23.
NC
Not connected
24.
NC
Not connected
25.
NC
Not connected
26.
AVSUP
Analog power 5 V
27.
AVSS
Analog ground
28.
MONO_IN
Mono input
29.
VREFTOP
Reference voltage
30.
SC1_IN_R
Scart input 1 in, right
31.
SC1_IN_L
Scart input 1 in, left
32.
ASG1
Analog Shield Ground 1
33.
SC2_IN_R
Scart input 2 in, right
34.
SC2_IN_L
Scart input 2 in, left
35.
ASG2
Analog Shield Ground 2
36.
SC3_IN_R
Scart input 3 in, right
37.
SC3_IN_L
Scart input 3 in, left
38.
ASG4
Analog Shield Ground 4
39.
NC
Not connected
40.
NC
Not connected
41.
NC
Not connected
Summary of Contents for 11AK33
Page 1: ...SERVICE MANUAL CTW3250 32 WIDE CTV Effective FEB02 CTW3250SERV ...
Page 39: ...38 GENERAL BLOCK DIAGRAM OF CHASSIS AK19PRO ...
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