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Symmetricom Inc

bc635VME/bc350VXI Time and Frequency Processor (Rev. E)

2-1

CHAPTER TWO
INSTALLATION AND SETUP

2.0 VME/VXI COMPATIBILITY SWITCHES

The TFP is designed for both VMEbus and VXIbus compatibility. Switches SW2-3 and SW2-4
are used to select the bus protocol. To select VXIbus compatibility set SW2-3 and SW2-4 to the
OPEN

or OFF

position. To select VMEbus compatibility set SW2-3 and SW2-4 to the CLOSED

or ON position.

P1

P2

SW1

SW2

1

8

1
4

P1

P2

SW1

SW2

1

8

1
4

SW1 and SW2 Location

Revision A Through Revision D

SW1 and SW2 Location

Revision H

Figure 2-1 Address Switches

Switch SW2-3 controls the register block addressing within the A16 address space. With this
switch in the VXI position, address bits A14 and A15 must be one for A16 selection. Switch
SW1 is then used to select the logical address for the module. With SW2-3 in the VME position,
the module can be mapped to any 64 byte block in the A16 address space. SW2-1 and SW2-2
set the A14 and A15 address bits, and SW1 is used to set the A13 through A6 address bits.

Switch SW2-4 controls the status/ID byte returned during interrupt acknowledge cycles. With
SW2-4 in the VXI position, the Status/ID byte returned during interrupt acknowledge cycles is
the logical address set with SW1. When SW2-4 is in the VME position, the Status/ID byte
returned during interrupt acknowledge cycles is the user programmable vector loaded into the
VECTOR register (discussed in Chapter Three).

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Summary of Contents for bc350VXI

Page 1: ...ed and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In stock Ready to ship TAR certified secure asset solutions Expert team I Trust guarantee I 100 satisfaction All trademarks brand names and brands appearing herein are the property of their respective owners Find ...

Page 2: ...bc635VME bc350VXI Time and Frequency Processor Revision E User s Guide 8500 0019 January 2004 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 3: ...tput 1 4 1 4 Environmental Specifications 1 4 1 5 Functional Overview 1 4 1 5 1 Time 1 4 1 5 1 1 Time Sync Mode 1 4 1 5 1 2 Time Format 1 5 1 5 1 3 Set Time 1 5 1 5 1 4 Set Year 1 5 1 5 1 5 Set Local Offset 1 5 1 5 1 6 Set Propagation Delay 1 5 1 5 1 7 Days 1 6 1 5 2 Time Code 1 7 1 5 2 1 Decode 1 7 1 5 2 2 Generate 1 7 1 5 3 Signals 1 7 1 5 3 1 Heartbeat Periodic Output 1 7 1 5 3 2 Strobe Output ...

Page 4: ... Input 4 5 4 1 4 Packet D Load D A Converter 4 5 4 1 5 Packet F Heartbeat Periodic Control 4 6 4 1 6 Packet G Offset Control 4 9 4 1 7 Packet H Set Time Code Format for Mode 0 4 10 4 1 8 Packet I Clock Source Select 4 10 4 1 9 Packet J Send Data TO GPS Receiver 4 10 4 1 10 Packet K Select Generator Code 4 11 4 1 11 Packet L Set Real Time Clock 4 11 4 1 12 Packet M Local Time Offset Select GPS Mode...

Page 5: ... 5 2 External Event Time Capture 5 2 5 3 Program Periodic Frequency of 1000 HZ 5 2 5 4 Set Mode 1 and the Major Time 5 3 5 5 Select Mode 0 IRIGB and Advance TFP 2 5 Milliseconds 5 3 CHAPTER SIX INPUTS AND OUTPUTS 6 0 Inputs and Outputs 6 1 CHAPTER SEVEN ADJUSTMENTS 7 0 General 7 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 6: ...F CONTENTS bc635VME bc350VXI Time and Frequency Processor Rev E Symmetricom Inc iv This Page Intentionally Left Blank Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 7: ...ith hardware registers which latch the current time upon host request Event logging days through 0 1 microseconds This feature is implemented with a second set of hardware registers Time is captured on a positive or negative input edge Six operational modes are supported Modes are distinguished by the reference source Mode Source Of Synchronization 0 Timecode IRIG A IRIG B XR3 2137 NASA 36 1 Free ...

Page 8: ...curred 1 Periodic output has occurred 2 Time coincidence strobe has occurred 3 One second epoch 1PPS output has occurred 4 Output data packet is available Time of day hours minutes and seconds are displayed on front panel LED s Most inputs and outputs are accessible via the P2 connector 1 2 PHYSICAL OVERVIEW The TFP is a B size module 6U X 160 mm Operation is controlled by a block of thirty two D1...

Page 9: ...tio 3 1 Output Amplitude 0 to 10 volts peak to peak adjusted by VR1 into 50Ω Format DCLS IRIG B IRIG H DC Level Shift TTL CMOS compatible into 50Ω 1 3 3 BUS CHARACTERISTICS Address Space A16 AM codes 29 and 2D 64 bytes Data Transfer D16 Interrupter D08 0 I 1 7 ROAK Power 5 1 5amps 12 50 milliamp 12 30 milliamp 1 3 4 DIGITAL INPUTS Event Capture TTL CMOS positive or negative edge triggered 20 nanos...

Page 10: ... 50Ω 1 3 7 OSCILLATOR CONTROL OUTPUT Control Range 0 5V Transfer Coefficient Positive 1 4 ENVIRONMENTAL SPECIFICATIONS Temperature Operating 0 to 70o centigrade Non Operating 30 to 85o centigrade Relative Humidity Operating 85 85 o C 1000 hours Altitude Operating 400 to 18 000 meters MSL 1 5 FUNCTIONAL OVERVIEW This section describes the functions provided by the bc635VME bc350VXI Time and Frequen...

Page 11: ... will allow the TFP device to extract the time of year data from the time code source while using year information provided by the user The board will decode the year and roll over the days for a leap year 365 366 001 or a non leap year 365 001 The supported range is 1990 2037 The board will follow the input time source if the input rollover day sequence does not match the board rollover day seque...

Page 12: ...0 366 001 00 01 366 001 2 2 1 00 Freerun N A 365 00 365 366 2 2 2 00 Freerun N A 366 01 366 001 Note 1 Day went to 366 for about one second then went to day 001 For the optional Accept Day 000 Mode the TFP will accept an input source with an input day of 000 Table 2 shows the possible combinations for this mode Table 2 Accept Day 000 Mode Combination number Board year Input mode Input Year Input d...

Page 13: ...ce a clock signal at a specified frequency The heartbeat signal also referred to as a periodic can be either synchronous or asynchronous to the internal 1PPS epoch in the TFP device This functionality is implemented in hardware on the TFP device by an Intel 82C54 counter timer chip The heartbeat circuit has two 16 bit divisors which are clocked by the counter As the output of the first divisor pro...

Page 14: ...by the TFP device If the latch event time function is enabled the TFP will latch the time in the event time registers when an interrupt is detected The user may query the event time registers to see when a particular event occurred The latch event time function should not be enabled when external events are selected as these already latch the time in the event registers Three control registers are...

Page 15: ...ith this switch in the VXI position address bits A14 and A15 must be one for A16 selection Switch SW1 is then used to select the logical address for the module With SW2 3 in the VME position the module can be mapped to any 64 byte block in the A16 address space SW2 1 and SW2 2 set the A14 and A15 address bits and SW1 is used to set the A13 through A6 address bits Switch SW2 4 controls the status I...

Page 16: ...r OFF 0 0 0 0 0 0 0 0 0 1 0x0040 0x007F 0 CLOSED or ON 0 0 0 0 0 0 0 0 1 0 0x0080 0x00BF 0 0 0 0 0 0 0 0 1 1 0x00C0 0x00FF 0 0 0 0 0 0 0 1 0 0 0x0100 0x013F 1 1 1 1 1 1 1 0 1 1 0xEFC0 0xFEFF 1 1 1 1 1 1 1 1 0 0 0xFF00 0xFF3F 1 1 1 1 1 1 1 1 0 1 0xFF40 0xFF74 To select a base address set each of the switches to the logical zero CLOSED or ON or the logical one OPEN or OFF state 2 2 bc350VXI LOGICAL ...

Page 17: ... This jumper is not present on the P100004 model boards JP4 The jumpers in the JP4 group are designed to be moved as a pair Positions 3 4 and 5 6 define one configuration and positions 1 2 and 7 8 define a second configuration In the default configuration the TFP is configured with an auxiliary RS 422 output In the second configuration the TFP is configured in a daisy chain mode the RS 422 input i...

Page 18: ... 2 3 4 JP2 1 2 3 4 JP3 1 2 3 4 JP5 1 2 3 4 JP1 P2 1 2 3 4 JP4 Figure 2 2 Jumper Locations I P1 Jumper Location Revision G and Up 1 2 3 4 JP2 1 2 3 4 JP3 1 2 3 4 JP5 1 2 3 4 JP1 P2 1 2 3 4 JP4 1 2 3 JP6 P1 Jumper Location P100004 Models 1 2 3 4 JP2 1 2 3 4 JP5 1 2 3 4 JP1 P2 1 2 3 4 JP6 Figure 2 3 Jumper Locations II Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www arti...

Page 19: ...t used bc635VME users must verify that signals on rows A and C of the P2 connector are not used for VSB or other purposes The TFP provides signal I O on rows A and C that may produce a conflict If a conflict does exist a solution is to obtain a bc635VME with the P2 connector removed Verify that power is off and insert the TFP into the chassis securing it in the slot by tightening the two front pan...

Page 20: ...ER TWO 2 6 bc635VME bc350VXI Time and Frequency Processor Rev E Symmetricom Inc This Page Intentionally Left Blank Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 21: ...odics may optionally be synchronous with the 1pps epoch if the period is expressible as a ratio of integers Major Time Units of time larger than or equal to seconds A day hr min sec format is usually implied Minor Time Subsecond time to whatever resolution is supported Packet A group of bytes conforming to a defined structure Packets are usually used in bit serial or byte serial data transmission ...

Page 22: ...EVENT3 STROBE3 Event Time Strobe Time 1E R EVENT4 Event Time 20 R W UNLOCK Release Lockout Capture Time 22 R W ACK Acknowledge Register 24 R W CMD Command Register 26 R W FIFO FIFO Input Output D16 or D08 O 28 R W MASK Interrupt Mask 2A R W INTSTAT Interrupt Status 2C R W VECTOR Interrupt Vector 2E R W LEVEL Interrupt Level 30 3E Reserved Offset 0x00 ID REGISTER Reset Value 0xXef4 This register wa...

Page 23: ...ored during a write Offset 0x0A TIMEREQ Reset Value NA Reading this register latches the current time and status into offsets 0x0C through 0x14 The value read is indeterminate WARNING Many compilers will optimize out of existence an assignment made to a local variable if that variable is not used For example the following code snippet may not read offset 0x0A timeptr short BASE 0x0A initialize poi...

Page 24: ... 8 7 4 3 0 EVENT0 Field Not Defined Not Defined Status Note 1 Days Hundreds EVENT1 Field Days Tens Days Units Hours Tens Hours Units EVENT2 Field Minutes Tens Minutes Units Seconds Tens Seconds Units EVENT3 Field 10E 1 Seconds 10E 2 Seconds 10E 3 Seconds 10E 4 Seconds EVENT4 Field 10E 5 Seconds 10E 6 Seconds 10E 7 Seconds Not Defined Note bit 6 1 frequency offset 5E7 in Mode 0 0 frequency offset 5...

Page 25: ...e two times independently Offset 0x22 ACK Reset Value 0xXX00 Table 3 6 Bit Control Function SET 1 High Voltage CLEAR 0 Low Voltage 0 TFP HOST SETS bit to acknowledge the receipt of a valid input packet from host CLEARS bit by writing to this register with bit 0 SET 1 Reserved 2 TFP HOST SETS bit when output FIFO contains a data packet CLEARS bit by writing to this register with bit 2 SET This bit ...

Page 26: ...e 1 enable 4 STREN Time coincidence output strobe enable 0 disable 1 enable 5 STRMODE Strobe mode 0 use major and minor time 1 use minor time only In mode 1 an output strobe is produced each second 6 FREQSEL0 0 10 MHz 1 5 MHz 0 1 MHz 1 1 MHz 7 FREQSEL1 0 0 1 1 8 15 Reserved Offset 0x26 FIFO Reset Value NA Reads take data from the output FIFO Writes place data into the input FIFO Both the input FIF...

Page 27: ...ing upon which interrupt source generated the interrupt The INTSTAT register bits are set regardless of the state of the mask bits This feature allows the host to poll for the occurrence of the interrupt sources INTSTAT bits are cleared by writing to the INTSTAT register with the corresponding bit s set WARNING It is the transition of an INTSTAT bit from a zero to a one that causes an interrupt to...

Page 28: ... register selects the level at which an interrupt will be generated Only bits zero through two are used These bits are encoded as follows Bit IRQ Level 0 0 0 Disabled 0 0 1 IRQ1 0 1 0 IRQ2 0 1 1 IRQ3 1 0 0 IRQ4 1 0 1 IRQ5 1 1 0 IRQ6 1 1 1 IRQ7 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 29: ... an input packet is available by writing 0x80 to the ACK register The TFP will set bit 0 of the ACK register when the packet is processed When the host sets bit seven of the ACK register an interrupt to the TFP CPU is generated The TFP service routine performs minimalist packet integrity checking The TFP checks that the first packet byte is 0x01 ASCII SOH If the SOH is found the TFP loads FIFO dat...

Page 30: ...de 1 Free Running Mode This mode is virtually the same as Mode 2 Without a 1pps input the TFP runs at the last known oscillator frequency Major time can be set with the B packet The TFP timebase can be adjusted with packet D Mode 2 External 1 pps Mode The TFP synchronizes to the signal on the 1pps input Major time can be loaded with the B packet The acquisition range is the same as described in mo...

Page 31: ... Modulated Time Code Expected Gencode IRIG B TFP Generates IRIG B Path 1 Path Selection Variable See P Packet Local 0 Local Time Offset GPS Modes Only Accum 32000 VCXO DAC Value Nominally Centered Leapsec 0 GPS To UTC Leap Second Correction Only Used In GPS Modes The diagnostic utility of this mode resides in the fact that the operator can immediately determine if the host program is communicating...

Page 32: ...ote All data fields must be in ASCII format Day 000 is an invalid time code in IRIG time codes If Day 000 is desired see Packet P Path Selection The time loaded by packet B will not be used until the one second epoch following the load The TFP increments the time before loading it to output buffer registers The time is incremented at approximately 918 milliseconds into the current frame and the bu...

Page 33: ...ator is voltage controlled using the buffered output of a 16 bit D A converter as the controlling voltage Packet D allows the user to directly load a 16 bit value to the D A converter This feature would allow a user to fine tune the TFP time base in the free running mode We are not aware of any other use for this packet in normal operation Since this voltage is routed out of the TFP via pin 9 on t...

Page 34: ...by two If n1 is selected as two and n2 is selected as ten the output waveform is a pulse train with a one tenth duty cycle The packet F format is as follows byte 1 SOH byte 2 F byte 3 2 for asynchronous 5 for synchronous byte 4 0 F m1 bits 12 15 byte 5 0 F m1 bits 08 11 byte 6 0 F m1 bits 04 07 byte 7 0 F m1 bits 00 03 byte 8 0 F m2 bits 12 15 byte 9 0 F m2 bits 08 11 byte 10 0 F m2 bits 04 07 byt...

Page 35: ...second is always of the following form N 10 000 000 n1 n2 where N counts per second n1 Counter 1 divide n2 Counter 2 divide The range of values for Counter 1 and 2 is mode dependent as follows Asynchronous Mode 2 to 65535 Synchronous Mode 3 to 65535 WARNING Periodic heartbeat pulse interrupt generation can not be guaranteed in synchronous mode when counter divide values of two are used The two mod...

Page 36: ...r design Example It is desired to implement 10000 counts per second synchronous with the 1pps mode 5 synchronous n1 1 10 n2 1 100 10 000 000 10 100 10000 byte 1 SOH byte 2 F byte 3 5 mode byte 4 0 byte 5 0 byte 6 0 byte 7 9 n1 9 byte 8 0 byte 9 0 byte 10 6 byte 11 3 n2 99 0x63 byte 12 ETB Other values of n1 1 and n2 1 could have been used For example n1 1 25 and n2 1 40 Artisan Technology Group Qu...

Page 37: ...elow byte 1 SOH byte 2 G byte 3 or advance or retard byte 4 0 9 BCD millisecond hundreds byte 5 0 9 BCD millisecond tens byte 6 0 9 BCD millisecond units byte 7 0 9 BCD microsecond hundreds byte 8 0 9 BCD microsecond tens byte 9 0 9 BCD microsecond units byte 10 0 9 BCD nanosecond hundreds byte 11 ETB For the IRIG B scenario described above a positive offset should be used WARNING If offsets large...

Page 38: ...ulation DC level shift DC level shift not is supported for 2137 and XR3 codes 4 1 8 PACKET I CLOCK SOURCE SELECT Packet I is used to select the clock source for the TFP The TFP uses a frequency of 10MHz for all timing functions The 10 MHz be may derived from the TFP VCXO or it may be supplied from an external oscillator via J1 pin 1 or P2 pin C22 The packet format is as follows byte 1 SOH byte 2 I...

Page 39: ...L TIME CLOCK This packet loads the battery backed real time clock IC which is used as the source of major time and 1pps epoch when mode three is selected The format is shown below byte 1 SOH byte 2 L byte 3 years tens byte 4 years units byte 5 months tens byte 6 months units January month 1 byte 7 day of month tens byte 8 day of month units byte 9 hours tens byte 10 hours units byte 11 minutes ten...

Page 40: ... to be displayed The offset only applies to the hour s digits This offset is maintained in battery backed RAM The format is as follows byte 1 SOH byte 2 M byte 3 sign or byte 4 hours tens byte 5 hours units byte 6 ETB The hours are in range from 12 to 12 A positive sign is used from the prime meridian heading East and a negative sign is used from the prime meridian heading West For example Eastern...

Page 41: ...data Note The user is advised that repetitively issuing Packet O can cause excessive CPU overhead and may disrupt time keeping Currently three different data packets may be requested using the O packet The formats are as follows Request Format byte 1 SOH byte 2 O byte 3 0 or 1 or 2 byte 4 ETB Response Format 0 Request RTC Time See Packet L byte 1 SOH byte 2 o lower case letter byte 3 0 zero byte 4...

Page 42: ...yte 4 leap second tens byte 5 leap second units byte 6 ETB Response Format 3 Request RTC Year byte 1 SOH byte 2 o lower case letter byte 3 3 byte 4 RTC years tens byte 5 RTC year units byte 6 ETB Response Format 4 Request Year byte 1 SOH byte 2 o lower case letter byte 3 4 byte 4 years tens byte 5 year units byte 6 ETB The TFP signals a packet ready condition by setting bit 2 in the ACK register I...

Page 43: ...Definitions bit 3 0 enable TFP disciplining 1 disable TFP discipline bit 2 0 enable jamsynch 1 disable jamsynch bit 1 0 leap year off 1 leap year on bit 0 0 Accept Day 000 1 Day 000 invalid default setting Note Time through TIME4 contain atomic seconds since January 6 1980 Use only in GPS Mode See Table 4 2 4 1 14 1 LOWER NIBBLE BIT DESCRIPTIONS Bit 0 In Time Code mode Mode 0 it is sometimes desir...

Page 44: ...te during warm up Bit 3 Oscillator disciplining might be disabled if you were using an external clock source that requires a different disciplining routine and you are using the on board DAC and disciplining through a Packet D 4 1 14 2 UPPER NIBBLE BIT DESCRIPTIONS Bit 0 When enabled packets written to the INPUT FIFO will be automatically echoed to the OUTPUT FIFO Bit 1 This bit is used when you w...

Page 45: ... bus Originally this feature was used for Symmetricom developmental purposes but it would also be indispensable to anyone attempting to discipline an external oscillator using the TFP The format is as follows byte 1 SOH byte 2 Q byte 3 0 F least significant nibble byte 4 0 F most significant nibble byte 5 sense 1 positive 0 negative byte 6 ETB 4 1 16 PACKET S SET YEAR This packet allows users to s...

Page 46: ...R FOUR 4 18 bc635VME bc350VXI Time and Frequency Processor Rev E Symmetricom Inc This Page Intentionally Left Blank Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 47: ...ne ETB 0x17 define FIFO short BASE 0x27 The following global variables are also declared and used throughout this chapter short dummy readptr time 5 long i 5 1 READING TIME ON DEMAND The following example reads the time from the TFP registers TIME0 through TIME4 and loads this data into the array time The time is latched by reading the TIMEREQ register and the register is assigned to a global vari...

Page 48: ...0x2C define MASK short BASE 0x28 define INTSTAT short BASE 0x2A define LEVEL short BASE 0X2E define UNLOCK short BASE 0x20 INITIALIZE TFP EVENT HARDWARE CMD 0x09 enable event and lockout VECTOR 0x40 interrupt vector LEVEL 0x03 interrupt level set INSTAT 0x01 clear INSTAT bit MASK 0x01 enable the interrupt INTERRUPT SERVICE ROUTINE FRAGMENT readptr EVENT0 for i 0 i 5 i time i readptr dummy UNLOCK r...

Page 49: ...mple selects the free running mode and sets the TFP major time using the B packet send_packet A1 select mode 1 INSTAT 0x08 clear INSTAT 1pps bit while INSTAT 0x08 wait for 1pps send_packet B123112233 set the days through seconds 5 5 SELECT MODE 0 IRIGB AND ADVANCE TFP 2 5 MILLISECONDS The following code fragment selects the mode timecode and offset The last P packet is used to disable jamsynchs si...

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Page 51: ...luminated The time display is incremented at 990 milliseconds into the current frame One customer measured the LED radix point with a photo diode and reported that it was indeed early Timecode is input using BNC connector J3 or J1 7 Input amplitudes from 0 5 to 5 volts peak to peak are accommodated Timecode is output on BNC connector J2 or J1 5 The output amplitude is adjustable using ten turn pot...

Page 52: ... Tx 5 Time Code Output AM 5 Ground 6 External Event Input 6 Not Used 7 Time Code Input 7 GPS 1PPS 8 Time Code Return 8 GPS RS 422 1PPS 9 Oscillator Control Output 9 GPS RS 422 1PPS 10 Not Used 10 Ground 11 Time Code Output DCLS 11 GPS RS 422 Tx 12 Ground 12 GPS RS 422 Tx 13 1 5 10 MHz Output 13 Not Used 14 External 1PPS Input 14 Ground 15 Periodics Output 15 GPS 12 VDC Pin 1 is an output when the ...

Page 53: ...ut AM C6 External Event Input C8 Strobe Output C9 Periodic Output C10 External 1PPS Input C11 1PPS Output C12 1 5 10MHz Output Note 2 C22 10MHz Input C24 Oscillator Control Output C18 C20 RS 422 Tx Rx A18 A20 RS 422 Tx Rx A26 RS 422 Rx GPS Note 1 C26 RS 422 Rx GPS Note 1 A28 GPS 1PPS Note 1 Note Hardware Rev E and later Note 2 Hardware Rev G and later See JP6 Artisan Technology Group Quality Instr...

Page 54: ...ER SIX 6 4 bc635VME bc350VXI Time and Frequency Processor Rev E Symmetricom Inc This Page Intentionally Left Blank Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 55: ...a dual trace oscilloscope and a time code input Set the TFP to Mode 0 Packet A and select the appropriate time code format and modulation type Packet H Connect channel 1 of the oscilloscope to pin 16 of U19 XR2212 Connect channel 2 of the oscilloscope to the modulated input time code Trigger the oscilloscope on the channel 1 input Adjust VR2 so that the positive transition of the TTL signal input ...

Page 56: ...ts the amplitude of the modulated IRIG B output time code A value of one volt RMS is common as is three volts peak to peak on the high cycles Adjust this value to suit the equipment being driven The range is zero to twenty four volts peak to peak Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 57: ...information about the complete range of Quality Timing Products from the Symmetricom Group of Companies call 1 800 544 0233 in the US and Canada Or visit our site on the world wide web at http www symmetricom com for continuously updated product specifications news and information Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com ...

Page 58: ...quipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentation Artisan Scientific Corporation dba Artisan Technology Group is not an affiliate representative or authorized distributor for any manufacturer listed herein We re here to make your life easier How...

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