2-28
X9DRD-EF Motherboard User’s Manual
JPME1
JI2C1
VGA1
I-SA
TA1
I-SA
TA0
I-SA
TA5
I-SA
TA4
I-SA
TA3
I-SA
TA2
JIPMB1
JPME2
JPL1
JBR1
JWD1
JPG1
JPB1
JVRM_I2C1
JVRM_I2C2
JVR1
FAN5
FAN6
FAN8 FAN7
FAN1
FAN2
FAN3
FAN4
JF2
T-SGPIO1
T-SGPIO2
JUSB6
JSD1
JBT1
JBAT1
JTPM1
JF1
JPI2C1
JOH1
JI2C2
JL1
JSTBY1
JUIDB
J4
JD1
LED3
LEDM1
LED2
LAN2
LAN1
CPU1
CPU2
CPU2
CPU1
CPU2
CPU1
PWR I2C
UID
P2-DIMME1
P2-DIMMF2
P2-DIMMF1
P2-DIMMG2 P2-DIMMG1
P2-DIMMH2 P2-DIMMH1
P1-DIMMA2 P1-DIMMA1
P1-DIMMB2 P1-DIMMB1
P1-DIMMC1 P1-DIMMC2 P1-DIMMD1 P1-DIMMD2
USB4/5
USB8/9
SLOT1 PCI-E 3.0 X8
SLOT2 PCI-E 3.0 X8
SLOT3 PCI-E 3.0 X8
SLOT4 PCI-E 3.0 X8
SLOT5 PCI-E 3.0 X8
USB6
TPM/POR
T80
BUZZER
CMOS CLEAR
SLOT6 PCI-E 3.0 X8
COM2
USB2/3
COM1
USB0/1
SP1
CPU2
IPMI_LAN
CPU2
CPU2
Battery
BIOS
JPW1
JPW2
24-Pin Main PWR
8-Pin PWR
JPW4
P2-DIMME2
JPW3
8-Pin PWR
4-Pin PWR
Intel
PCH
LAN
CTRL
BMC
CPU1
X9DRD-EF
Rev. 1.02
A
A.
JPI
2
C1
B. JIPMB1
Power SMB (I
2
C) Connector
Power System Management Bus (I
2
C)
Connector (JPI
2
C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
definitions.
PWR SMB
Pin Definitions
Pin# Definition
1
Clock
2
Data
3
PWR Fail
4
Ground
5
+3.3V
IPMB
A System Management Bus header
for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here
to use the IPMB I
2
C connection on
your system.
IPMB Header
Pin Definitions
Pin# Definition
1
Data
2
Ground
3
Clock
4
No Connection
B
