Chapter 2: Installation
2-9
Power LED
The Power LED connection is lo-
cated on pins 15 and 16 of JF1.
Refer to the table on the right for
pin definitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and
20 of JF1. Refer to the table on
the right for pin definitions.
Pin
Number
19
20
Definition
Control
Ground
NMI Button Pin
Definitions (JF1)
Pin
Number
15
16
Definition
Vcc
Control
PWR_LED Pin Definitions
(JF1)
K
B
/
M
o
u
se
DIMM 3A
DIMM 3B
DIMM 2A
DIMM 2B
DIMM 1A
DIMM 1B
Tumwater
(North Bridge)
Marvell
IDE #1
IDE #2
U
S
B
0/1
COM2
COM1
8-pin
P W 2
ATX PWR
JPF
Force
PW-On
Mic
J 2 6
Audio
Enable
S
I/O
PCI-E (x16)
PCI-X (66 MHz)
PCI-X (66 MHz)
Battery
W O R
JPS1
F
AN1
LAN1
Aux in
CDin
PCI (33MHz)
J 1 3 J 1 5
JPL1
Floppy
PW LED/KL
SA
TA
2
Chassis
Intrusion
Hance
Rapids
USB2/3
JF1
JBT1
J W D
J 6
Dn:Line_In
Up:Line_Out
J 4 1
J
3
5
JS
L
E
D
S
A
T
A
L
E
D
S
A
T
A
I
2
C
(*
X
6
D
A
L
-X
T
G
)
Watch
D o g
LAN1 Enable
Fan5
Fan6
JWOL
J F 2 Spkr
CL CMOS
Fan4
FP Ctlr
Fan3
Fan2
CPU2
CPU1
SMB data toPCIEn.
SMBCLKtoPCI En.
CN1
AlMRset
J 2 7
J 7
P W
Fault
SMB PW
J 2
J 4
J 5
PCI (33MHz)
J 3
P W 1
PW3
J 4 3
LAN
CTRL
BIOS
Printer
Spkr
SA
TA
0
SA
TA
3
SA
TA
1
JL1
SATA
CTRL
Marvell SATA
Enable
H-SA
T
A
0
H-SA
T
A
1
JS0
JS1
DS1
DS3
DS6
DS2
DS5
DS7
DS8
DS9
Power Button
Overheat LED
1
NIC1 LED
Reset Button
2
Power Fail LED
HDD LED
Power LED
Reset
Pwr
Vcc
Vcc
Vcc
Vcc
Ground
Ground
19
20
Vcc
X
Ground
NMI
X
x
x
NMI
PWR LED
