Supero SUPER PIIIDM3, User Manual

Page: 96 / 98

S
UPER PIIIDM6/PIIIDM4/PIIIDM3/PIIIDME Manual
B-8
APPENDIX B
C h e c k
Point Description
99 Any initialization required after the option ROM test has
been completed. Configuring the timer data area and
printer base address next.
9A Set the timer and printer base addresses. Setting the
RS-232 base address next.
9B R e t u r n e d a f t e r s e t t i n g t h e R S - 2 3 2 b a s e a d d r e s s .
P e r f o r m i n g a n y r e q u i r e d i n i t i a l i z a t i o n b e f o r e t h e
Coprocessor test next.
9C R e q u i r e d i n i t i a l i z a t i o n b e f o r e t h e C o p r o c e s s o r t e s t i s
over. Initializing the Coprocessor next.
9D C o p r o c e s s o r i n i t i a l i z e d . P e r f o r m i n g a n y r e q u i r e d
initialization after the Coprocessor test next.
9E I n i t i a l i z a t i o n a f t e r t h e C o p r o c e s s o r t e s t i s c o m p l e t e .
C h e c k i n g t h e e x t e n d e d k e y b o a r d , k e y b o a r d I D , a n d
Num Lock key next. Issuing the keyboard ID command
next.
A2 Displaying any soft errors next.
A3 T h e s o f t e r r o r d i s p l a y h a s c o m p l e t e d . S e t t i n g t h e
keyboard typematic rate next.
A4 The keyboard typematic rate is set. Programming the
memory wait states next.
A5 Memory wait state programming is over. Clearing the
screen and enabling parity and the NMI next.
A7 NMI and parity enabled. Performing any initialization
required before passing control to the adaptor ROM at
E000 next.
A8 Initialization before passing control to the adaptor ROM
a t E 0 0 0 h c o m p l e t e d . P a s s i n g c o n t r o l t o t h e a d a p t o r
ROM at E000h next.