
2-30
X9DRG-O(T)F-CPU/X9DRG-O-PCIE Platform User’s Manual
SW1
JPW10
J21
SP1
JBT1
JITP0
JSD2
JSD1
JTPM1
I_SA
TA1
I-SA
TA0
I-SA
TA2
I_SA
TA3
JF1
JWD1
JBR1
JPME1
JPL1
JPG1
J29
JPB1
J30
LE1
LE4
DM1
FAN8
FAN6
FAN7
FAN5 FAN1
FAN3
FAN4
JSPK1
JL1
JOH1
JPLD1
JPW18
JPW17
JPW6
JPW12
JPW4
JPW5
JPW3
JPW13
JPW14
JPW15
JPW16
T-SGPIO2
T-SGPIO1
T-SGPIO-S1
BT1
JPW24
JPW23
JPW22
JPW21
BIOS
LICENSE
10G MAC CODE
10G SAN MAC
1G MAC CODE
IPMI CODE
BAR CODE
P2-DIMME1
P2-DIMME2
P2-DIMME3
P2-DIMMF1
P2-DIMMF2
P2-DIMMF3
USB10/1
1
USB2/3
CPU1
P1-DIMMC1 P1-DIMMC2 P1-DIMMC3 P1-DIMMD1 P1-DIMMD2 P1-DIMMD3
LAN2 LAN1
CPU2
P1-DIMMB3
P1-DIMMB2
VGA1
P1-DIMMB1
P2-DIMMH3
COM1
P1-DIMMA3 P1-DIMMA2
P2-DIMMH2
P1-DIMMA1
P2-DIMMH1
IPMI_LAN
P2-DIMMG3
USB0/1
P2-DIMMG2
P2-DIMMG1
REV:1.00
X9DRG-OF-CPU
S_SA
TA1
FAN2
JPW7
I_SA
TA4
I_SA
TA5
S_SA
TA2
S_SA
TA2
S_SA
TA3
JPME2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
USB8/9
PCH
BIOS
LAN
CTRL
BMC
BMC Firmware
CLK Chip
USB6
J34
J33
J32
J31
A. TPM/Port 80 Header
B. JOH1
TPM Header/Port 80
Trusted Platform Module/Port 80
header, located at JTPM1, provides
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin defini
-
tions.
TPM/Port 80 Header
Pin Definitions
Pin # Definition
Pin # Definition
1
LCLK
2
GND
3
LFRAME#
4
<(KEY)>
5
LRESET#
6
+5V (X)
7
LAD3
8
LAD2
9
+3.3V
10
LAD1
11
LAD0
12
GND
13
SMB_CLK(X)
14
SMB_DAT(X)
15
+3V_DUAL
16
SERIRQ
17
GND
18
CLKRUN# (X)
19
LPCPD#(X)
20
LDRQ# (X)
Overheat LED/Fan Fail
The JOH1 header is used to connect
an LED indicator to provide warnings
of chassis overheating and fan failure.
This LED will blink when a fan failure
occurs. Refer to the tables on right for
pin definitions.
Overheat LED
Pin Definitions
Pin# Definition
1
P3V3
2
OH Active
Low Signal
OH/Fan Fail LED
Status
State Message
Solid
Overheat
Blinking (1Hz)
Fan Fail
Blinking (0.25Hz)
PWRFail
A
B
Summary of Contents for X9DRG-O-PCIE
Page 12: ...1 4 X9DRG O T F CPU X9DRG O PCIE Platform User s Manual X9DRG O PCI E Card Image ...
Page 70: ...2 40 X9DRG O T F CPU X9DRG O PCIE Platform User s Manual Notes ...
Page 108: ...4 30 X9DRG O T F CPU X9DRG O PCIE Platform User s Manual UEFI OS Boot Priorities 1st Device ...
Page 112: ...4 34 X9DRG O T F CPU X9DRG O PCIE Platform User s Manual Notes ...
Page 114: ...A 2 X9DRG O T F CPU X9DRG O PCIE Platform User s Manual Notes ...
Page 118: ...B 4 X9DRG O T F CPU X9DRG O PCIE Platform User s Manual Notes ...