Supermicro X9DRG-O-PCIE, User Manual, Page: 15 / 119

Chapter 1: Overview
1-7
X9DRG-O(T)F-CPU Board Jumpers
Jumper
Description Default Setting
JBR1 BIOS Recovery Pins 1-2 (Normal)
JBT1 Clear CMOS See Chapter 2
JPB1 BMC Enabled Pins 1-2 (Enabled)
JPG1 VGA Enabled Pins 1-2 (Enabled)
JPL1 GLAN1/GLAN2 Enable Pins 1-2 (Enabled)
JPME1 Management Engine (ME)
Recovery Mode
Pins 1-2 (Normal)
JPME2 Management Engine (ME)
Manufacture Mode
Pins 1-2 (Normal)
JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)
X9DRG-O(T)F-CPU Connectors
Connectors Description
BT1 Onboard CMOS Battery (See Chpt. 3 for Used Battery Disposal)
COM1 Serial Port (COM1) Header
FAN1-8 CPU/System Cooling Fans
J21 X9DRG-O(T)F-CPU CPLD Programming
J31/32/33/34 Slot for Riser Card (RSC-X9DRG-O)
JF1 Front Panel Control Header
JL1 Chassis Intrusion
JOH1 Overheat LED Header
JPW3-JPW7,
JPW12-JPW16
PCIe Add-on Card AUX Power Connector
JPW17-JPW18 HDD Backplane Power Connector (See warning on next page)
JPW21/22/23/24 Power Supply Power Connector
JSD1/JSD2 SATA DOM (Devices on Module) Power Connectors
JTPM1 TPM (Trusted Platform Module)/Port 80
LAN1/LAN2 X540_based 10G Ethernet LAN Ports 1/2 (X9DRG-OTF-CPU); I350_based
1G LAN Ports 1/2 (X9DRG-OF-CPU)
(IPMI) LAN IPMI_Dedicated LAN
I-SATA 0-5 SATA 3.0 Connectors (I-SATA 0/1), SATA 2.0 Connectors (I-SATA 2-5) from
AHCI
S-SATA 1-4 SATA 2.0 connectors from SCU (S-SATA 1-4)
SP1 Onboard Speaker Header
SW1 UID Switch
T-SGPIO1/2 Serial_Link General Purpose I/O Header 1 for I-SATA Ports 0~3
Serial_Link General Purpose I/O Header 2 for I-SATA Ports 4~5