Supermicro X10SDV-F, User Manual

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X10SDV-TLN4F/F Motherboard User’s Manual
LAN3/4
LAN1/2
PCI-E3.0 X16
:TPM/PO
RT
80
USB 2/
3
USB 0/1(3.0)
USB 4/5
SLOT7
JBT1
IPMI_LA
N
JGPIO1
DESIGNED IN USA
1
X10SDV-TLN4F
REV:1.01
LED3
J6
BMC
AST2400
i350
CPU
JUIDB1
I-SGPIO2 I-SGPIO1 JF1
JL
1
JOH1
JD
1
PJ1
JSTBY1
JPW
1
LED8
LED7
LEDM1
BT
1
FA
N3
FAN2
FA
N1
COM1
VGA1
JTPM1
JSD
1
JPUSB1
JPME1
JPG
1
JPB1
JI2C
1
JI2C
2
JSMB1
JPL1
JBR
1
JPME2
I-SA
TA
3
I-SATA1
I-SATA2
I-SA
TA
5
I-SATA4
DIMMB2 DIMMA2 DIMMB1 DIMMA1
I-SA
TA
0
JIPMB1
JNVI2C1
SRW2
SRW1
JWD1
JPTG1
J21
A. I-SGPIO1
B. I-SGPIO2
C. JGPIO1
B A
Serial Link General Purpose Headers
(SGPIO)
Pin Definitions
Pin# Definition Pin Definition
1 NC 2 NC
3 Ground 4 DATA Out
5 Load 6 Ground
7 Clock 8 NC
I-SGPIO1/I-SGPIO2
Two Serial Link General Purpose In -
put/Output (SGPIO) headers are used
to communicate with the enclosure
management chip in the system. See
the table on the right for pin defini -
tions. Refer to the board layout below
for the locations of the headers.
C
GPIO Expander
Pin Definitions
Pin# Definition Pin Definition
1 P3V3 2 GND
3 GP0 4 GP1
5 GP2 6 GP3
7 GP5 8 GP5
9 GP6 10 GP7
GPIO Header (JGPIO1)
The JGPIO1 header is located near the
SATA connectors on the motherboard.
The JGPIO header is a general-purpose
I/O expander on a pin header via the
SMBus. See the table on the right for
pin definitions. Refer to the board layout
below for the locations of the headers.