Supermicro SuperServer 8048B-TRFT User Manual Download Page 67

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Chapter 7: BIOS

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SUPERSERVER 8048B-TRFT USER'S MANUAL

PSMI Support

Select Enabled for Power Supply Management Interface (PSMI) support. The
options are Enabled and

Disabled

VMSE Clock Stop

Select Enabled to de-activate the clock driver for the Intel Scalable Memory
Interconnect 2 (Intel SMI 2) controller. The options are Enabled and

Disabled

Safe MC (Micro Code) BGF (Buffer Generation First-in-First-Out) PSV

Select Enabled to use the Micro-Code Safe mode to allow the onboard power
control mechanism to supply power to the memory buffer on the on-demand basis
in an effort to save power consumption. The options are Enabled and

Disabled



Memory Topology

This item displays the status of each DIMM module as detected by the BIOS.

•

Node

•

Channel

•

DIMM Frequency



Memory RAS (Reliability_Availability_Serviceability)

Configuration

Use this submenu to configure the following Memory RAS settings.

Memory RAS Configuration Setup

Socket 0 Branch 0/Socket 0 Branch1/Socket 1 Branch 0/Socket 1

Branch1/Socket 2 Branch 0/Socket 2 Branch1/Socket 3 Branch 0/Socket

3 Branch1/

Select Enable to enable the memory module installed on the socket specified

by the user. The default setting is

Enable

and Disable.

Migration Spare

Use this feature to set the bit-mask of the riser card that is designated as a spare
riser. The default setting is

Current Memory Speed

This item displays the current memory speed.

Mirroring

This item indicates if memory mirroring is supported by the motherboard. Memory
mirroring creates a duplicate copy of the data stored in the memory to enhance
data security.

Sparing

This item indicates if memory sparing is supported by the motherboard. Memory
sparing enhances system performance.

Memory Rank Sparing

This item indicates if memory rank sparing is supported by the motherboard.
Memory rank sparing enhances system performance.

Spare Error/Memory Correctable Thr (Threshold)

Use this feature to set the correctable error threshold for spare memory modules.
The default setting is

32767

Leaky Bucket Low Bit

Use this feature to set the Low Bit value for the Leaky Bucket algorithm which
is used to check the data transmissions between CPU sockets and the memory
controller. The default setting is

Leaky Bucket High Bit

Use this feature to set the High Bit value for the Leaky Bucket algorithm which
is used to check the data transmissions between CPU sockets and the memory
controller. The default setting is

Publish SRAT (Static Resource Affinity Table)

Select Enable for the BIOS to report the ACPI SRAT table to the OS in order
to enhance CPU and memory performance when the NUMA (Non-Uniformed
Memory Access) is optimized. The options are

Enable

and Disable.

SRAT Memory Hot Plug

If t his item is set to Disable, memory hot-plugging support will be disabled and
hot-plugging entries will be removed. This feature is used for the OS that does
not support memory hot-plugging. The options are Enable and

Disable.

SRAT CPU Hot Plug

If t his item is set to Disable, CPU hot-plugging support will be disabled and hot-
plugging entries will be removed. This feature is used for the OS that does not
support memory hot-plugging. The options are Enable and

Disable