15
Chapter 1: Introduction
CPLD
BMC
Boot Flash
PCH
BIOS
CPLD
NAND
FLASH
#1A
X12SPO-F/-NTF
J1
J2
J3
J4
J5
J6
J7
J8
DMI Gen3x
4
PCIEx16_
1
CPLD
NOR
FLASH
DDR4_320
0
ChanC
ChanA
ChanB
ChanD
DDR4_320
0
ChanG
ChanF
ChanH
ChanE
NVMe*1
0
#1
#2
#3
#4
#5
#6
#7
#8
#9
#10
SATA III
SATA III *8
mini SAS HD*2
VGA CONN
COM1/2
Connector
Temp Sensor
TMP432
SATA DOM *2
BMC_SPI
2*PCIE X4
/ 2*SATA
M.2 *2
2*PCIEx4
DMI
USB3.0+2.0
USB2.0
SYS_SPI
LAN
X550(-NTF)
/ I350(-F)
SATA III *8
SATA III *2
6.0 Gb/S
10G/1G
RJ45
Rear *2
Front *2
TypeA*1
Debug Card
TPM HEADER
Rear *2
Front *4
*10 NVMe (-NTF)
*4 NVMe(-F)
NCSI CONN
SYSTEM POWER
7+1 PHASE
220W
VR13 HC
5 * PCI-E X8 , Gen4 , SLIM SAS (10* NVME)
PCI-E X8 , Gen2
DMI
#0+#1B+#3
NCSI
master
#2
LAN
RGRMII
FRONT PANEL
CTRL
FAN SPEED
PCI-E X1
2*USB 2.0
Intel
PCH
621A
RTL8211F
RJ45
ESPI
LBG-R
PCH_SPI
AST2600
BMC
RMII/NCSI
DDR4
PCI-E X16 , Gen4
6.0 Gb/S
CPU
PECI:30
SOCKET ID:0
System Block Diagram
The block diagram below shows the connections and relationships between the subsystems
and major components of the overall system.
Figure 1-5. System Block Diagram
Note:
This is a general block diagram and may not exactly represent the features on your
motherboard. See the following page for the actual specifications of your motherboard.
