Chapter 6: UEFI BIOS
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IMC Interleaving
This feature allows the user to configure Integrated Memory Controller (IMC) Interleaving
settings. The options are
Auto
, 1-way Interleave, and 2-way Interleave.
Memory Topology
This item displays the information of onboard memory modules as detected by the
BIOS.
Memory RAS Configuration
Static Virtual Lockstep Mode
Select Enable to run the system's memory channels in lockstep mode to minimize
memory access latency. The options are
Disable
and Enable.
Mirror Mode
This feature allows memory to be mirrored between two channels, providing 100%
redundancy and consequently reducing the memory capacity by half. The options are
Disable
, Mirror Mode 1LM, and Mirror Mode 2LM.
Memory Rank Sparing
Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are
Disable
and Enable.
Correctable Error Threshold
Use this feature to specify the threshold value for correctable memory error logging,
which sets a limit on the maximum number of events that can be logged in the memory
error log at a given time. Select a value between 1-32776. The default setting is
512
.
SDDC
Single device data correction (SDDC) organizes data in a single bundle (x4/x8 DRAM).
If any or all the bits become corrupted, corrections occur. The x4 condition is corrected
on all cases. The x8 condition is corrected only if the system is in Lockstep Mode. The
options are
Disable
and Enable.
ADDDC Sparing
Adaptive Double Device Data Correction (ADDDC) Sparing detects when the prede-
termined threshold for correctable errors is reached, copying the contents of the failing
DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The
options are
Disable
and Enable.
