S
UPER P4SAA
User's Manual
4-10
System BIOS Cacheable
If enabled, the system BIOS information stored in the BIOS ROM (Read Only
Memory) chip will be written and temporarily stored in the "cacheable"
memory section of the CPU, giving the CPU faster access to the information.
The options are "Disabled" and "
Enabled
".
Video BIOS Cacheable
If enabled, the information regarding the Video BIOS stored in the BIOS ROM
(Read Only Memory) chip will be written and temporarily stored in the
"cacheable" memory section of the CPU, giving the CPU faster access to
the information. The options are "
Disabled
" and "Enabled".
Delayed Transaction
This setting compensates for the slower speed of ISA cards on a PCI
i n t e r f a c e a n d s o i s o n l y r e l e v a n t i f I S A c a r d s a r e p r e s e n t o n t h e
motherboard. The options are "
Enabled
" and "Disabled".
Delay Prior to Thermal
The options for this setting are "4 Min", "8 Min", "
16 Min
" and "32 Min".
AGP Aperture size (MB)
This setting allows the user to set the aperture size for the Accelerated
Graphics Port (AGP). The options are "4", "8", "16", "32", "
64
", "128" and
"256" (MB).
On-Chip Primary PCI IDE
The integrated peripheral controller contains an IDE interface with support
for two IDE channels. Select Enabled to activate each channel separately.
The options for this setting are "
Enabled
" and "Disabled".
DRAM Data Integrity Mode
This item allows you to set a method for finding data errors. The options
are "
ECC
" and "non-ECC".
