Supermicro MBI-6219G-T, User Manual

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Chapter 5: BIOS
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select
Stay-Off for the system power to remain off after a power loss. Select
Power-On for the system power to be turned on after a power loss. Select
Last State to allow the system to resume its last power state before a
power loss. The options are Power-On,
Stay-Off and Last State.
WOL Support
Select Enabled to enable WOL support which will allow the system to
"wake-up" when a device connected to a LAN port receives a signal. The
options are Disabled and
Enabled.
Table 5-4. CPU Configuration Submenu
Menu Option Description
Processor Information
Static processor information is displayed at the top of the menu for
Processor ID, Processor Frequency, Microcode Revision, L1 Cache RAM,
L2 Cache RAM and Processor Version.
Clock Spread Spectrum
If this feature is set to Enabled, the BIOS utility will monitor the level of
Electromagnetic Interference caused by the components and will attempt
to reduce the interference whenever needed. The options are Enabled and
Disabled .
Hyper-Threading (ALL)
This feature can be enabled for Windows and Linux operating systems that
use Hyper-Threading technology, and disabled for other operating systems
that don’t use it. When Disabled, only one thread per enabled core is
enabled. Options are Enabled or
Disabled .
Cores Enabled
This feature allows you to specify the number of cores to enable. 0 means
all cores, with 8 cores available. Default is
0 .
Monitor/Mwait
Select Enabled to implement the Mwait instruction along with the Monitor
instruction to allow the processor to specify the location for the BIOS to
monitor activities and to issue the instruction to put the operation on hold
(Mwait). Options are
Enabled or Disable.
Execute Disable Bit
Set to Enabled to enable the Execute Disable Bit which will allow the
processor to designate areas in the system memory where an application
code can execute and where it cannot, thus preventing a worm or a virus
from flooding illegal codes to overwhelm the processor and damage the
system during an attack. The default is
Enabled . (Refer to Intel and
Microsoft Web Sites for more information.)
PPIN Control
When this Protected Processor Inventory Number feature is enabled, the
processor will return a 64-bit ID number via the PPIN MSR. Options
include
Unlock/Enable and Unlock/Disable.
Hardware Prefetcher
Use this feature to turn on/off the Mid Level Cache (L2) streamer
prefetcher. Options include either
Enable or Disable.
Adjacent Cache Prefetch
Use this featue to turn on/off prefetching of adjacent cache lines. Options
include either
Enable or Disable.
DCU Streamer Prefetcher
This feature allows you to enable prefetch of the next L1 data line based
upon multiple loads in the same cache line. Options include either
Enable
or Disable.
DCU IP Prefetcher
This feature allows you to enable prefetch of the next L1 line based upon
sequential load history. Options include either
Enable or Disable.
Table 5-3. Boot Feature Submenu (Continued)
Menu Option Description