Supermicro 5038K-i, User Manual

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7-15
Chapter 7: BIOS
Data Scrambling
Select Enabled to enable data scrambling to enhance system performance and
data integrity. The options are Enabled and Disabled.
Allow SBE during Training
Select Enabled to use the "Specifi cations by Example" (SBE) model in memory
training. The options are Enabled and Disabled.
Scrambling Seed Low
Use this item to confi gure the setting for the low 32 bits of the scrambling seed.
The default setting is 41003 .
Scrambling Seed High
Use this item to confi gure the setting for the high 32 bits of the scrambling seed.
The default setting is 54165 .
DLL Reset Test
This item allows the user to decide how many times of DDL reset tests should
be performed. The default setting is 0 .
MC (Memory Controller) ODT Mode
This item allows the user to select the MC ODT mode. The options are 100
Ohms and 50 Ohms .
ODT Activation
This item allows the user to select the ODT Activation mode. The options are
Memory Controller Activation and DIMM Register Activation .
C/A Parity Error
Select Enabled to enable DDR4 Command Address Parity support to enhance
memory performance. The options are Enabled and Disabled.
SMB Clock Frequency
This item allows the user to set the DDR4 SMB Clock Frequency for SPD ac-
cess. The options are 100 Khz, 400 Khz, and 1 Mhz.
Opportunistic Self-Refresh
Select Enabled to enable Opportunistic Self-Refreshing support to enhance
memory performance. The options are Enabled and Disabled.
Forced Self-Refresh
Select Enabled to force the memory controller to perform a Self-Refreshing to
enhance memory performance. The options are Enabled and Disabled.