Supermicro 2028UT-BC1NRT, User Manual, Page: 102 / 138

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SUPERSERVER 2028UT-BTNRT/BC1NRT User’s Manual
transmission lines is located inside a chip instead of on a printed circuit board.
The options are
Aggressive Timing and Conservative Timing.
MxB Rank Sharing Mapping
Use this feature to select the address-mapping setting for memory-rank sharing
to enhance extended multimedia platform performance. The options are
Maximum Performance and Maximum Margin.
DIMM Vref. (Voltage Reference) Circuit
This feature allows the user to decide how to configure the voltage reference
point (gate) for a DDR3 memory module. The options are Internal and External .
BIOS VMSE Reset
If this feature is set to Enable, BIOS settings pertaining to the Intel Scalable
Memory Interconnect 2 (Intel SMI 2) controller will be reset to improve system
performance. The options are Disable and
Enable
.
Save JCK Error Longs
Select Enable to save the JCK Error log at each system reset caused by system
firmware. The options are Enable and Disable .
Phase Shedding
Select Enabled to enable Static Phase-Shedding support for DDR3 memory
voltage regulators to improve memory performance. The options are
Auto ,
Disabled and Enabled.
Multi-Threaded MRC (Memory Reference Code)
Select Enabled for the system to execute multi-threaded memory codes to
improve memory performance. The options are
Auto , Disabled and Enabled.
Rank Multiplication
Select Enabled to force the LRDIMM (Load-Reduced DIMM) memory modules to
operate at the Rank-Multiplication mode for memory performance enhancement.
The options are
Auto and Enabled.
LRDIMM (Load-Reduction DIMM) Module Delay
When this item is set to Disabled, the MRC (Memory Regulator Controller) will
not use SPD bytes 90-95 for module delay on LRDIMM memory. The options
are
Disabled and Auto.
Memory Type
Use this feature to select the memory type to be used in this system. The options
are RDIMMs only, UDIMMs only, and
UDIMMs and RDIMMs .