Supermicro 1020A-T, User Manual

Page: 83 / 100

Chapter 7: BIOS
7-15
ECC Confi guration
DRAM ECC Enable
DRAM ECC allows hardware to report and correct memory errors automatically.
Options are Enabled and Disabled.
MCA DRAM ECC Logging
When "Enabled", MCA DRAM ECC logging and reporting is enabled. Options
are Enabled and Disabled .
ECC Chip Kill
Allows the user to Enable or Disable ECC Chip Kill.
DRAM Scrub Redirect
Allows system to correct DRAM ECC errors immediately, even with back-
ground scrubbing on. Options are Enabled and Disabled .
DRAM BG Scrub
Corrects memory errors so later reads are correct. Options are Disabled
and various times in nanoseconds and microseconds.
L2 Cache BG Scrub
Allows L2 cache RAM to be corrected when idle. Options are Disabled and
various times in nanoseconds and microseconds.
Data Cache BG Scrub
Allows L1 cache RAM to be corrected when idle. Options are Disabled and
various times in nanoseconds and microseconds.
IOMMU Option Menu
IOMMU Mode
IOMMU is supported on Linux-based systems to convert 32-bit I/O addresses
to 64-bit. Options are Disabled , Best Fit and Absolute. Selecting the Best Fit
or Absolute settings allows the user to select aperture size.
Memory Timing Parameters
Select which node's timing parameters to display (on the same screen below).
Options are CPU Node 0 and CPU Node1.