Version 1.1.1
Page 7 of 38
SMT398 User Manual
Introduction
Related Documents
TI TIM specification & user’s guide
Block Diagram
Sundance Digital Bus
or Sundance High-speed Bus
connector x4
2x
C
omm
-P
or
ts
/S
DL
24
I/
O
pins
In
te
rru
pt
s&
Re
se
t
5 I
/O
pi
ns
4
x Co
m
m
-Port/
S
D
L
48
I
/O
p
in
s
Globa
l B
us
78
I
/O
p
in
s
183 I/O pins; 16-bit data
FPGA
Virtex-II FF896/1152
XC2V1000 - XC2V8000
432 to 824 I/O Pins
1.5V Core
1.5V/3.3V I/O
2,4,8 or 16Mbytes ZBT-
RAM as SMT358
Xilinx XC95288 CS280 CPLD
on Comm-Port #0 and #3
and Config&Timer&control
JTAG Header
SelectMAP Header
J1 Top Primary TIM
Connector
Comm-Port 0 & 3
J3 Global Expansion
Connector
J2 Bottom Primary TIM
Connector
4xComm-Port/SDL 1;2;4 & 5
On-board
Oscillator
4 LEDs or
4 I/O pins
External Clock
120 I/O pins; 16-bit data
2, 4 Mbytes QDR-SRAM
2x (1 or 2Mx18)
16 I/O pins
240 I/O Pins
Clk
Figure 1:SMT398 Block Diagram
Summary of Contents for SMT398
Page 1: ...SMT398 User Manual...
