STP1612PW05
Electrical characteristics
Doc ID 15819 Rev 4
11/35
Figure 3.
Test circuit for electrical characteristics
Table 10.
Switching characteristics (V
DD
= 5.0 V) T
A
= -40 ~ 125
°
C
Symbol Characteristics
Conditions
Min. Typ. Max. Unit
t
SU0
Setup time
SDI - CLK
↑
V
DD
= 5.0 V
V
IH
= V
DD
V
IL
= GND
R
ext
= 460
Ω
V
LED
= 4.5 V
R
L
= 152
Ω
CL = 10 pF
C1 = 100 nF
C2 = 10
μ
F
I
O
= 20 mA
1 ns
t
SU1
LE
↑
– DCLK
↑
1 ns
t
SU2
LE
↓
– DCLK
↑
5 ns
t
H0
Hold time
CLK
↑
- SDI
3
ns
t
H1
CLK
↑
- LE
↓
7 ns
t
PD0
Propagation
delay time
CLK - SDO
30
40
ns
t
PD1
PWCLK-OUTn4
(1)
1.
Refer to the timing waveform, where n = 0, 1, 2, 3.
100 ns
t
PD2
LE – SDO
(2)
2.
In timing of “read configuration” and “read error status code”, the next CLK rising edge should be t
PD2
after
the falling edge of LE.
30 40 ns
t
DL1
Stagger delay
time
OUTn4 + 1
(1)
40 ns
t
DL2
OUTn4 + 2
(1)
80 ns
t
DL3
OUTn4 +3
(1)
120 ns
t
w(L)
Pulse width
LE 5
ns
t
w( CLK)
CLK 20
ns
t
w(PWCLK)
PWCLK 20
ns
t
ON
Output rise time of output ports
10
ns
t
OFF
Output fall time of output ports
6
ns
t
EDD
Error detection minimum duration
(3)
3.
Refer to
1
µs
P W C L K
CLK
LE
DD
V
EXT
-
R
GND
SDO
O UT0
.
..
Generator
Function
DD
I
V
IH
=V
DD
V
IL
=G ND
waveform
input
Logic
SDI
O UT15
OUT
I
V
IH
,V
IL
V
DD
R
ext
I
OL
I
OH
