Hardware layout and configuration
UM2407
30/48
UM2407 Rev 1
Table 14. Solder bridge and jumper configuration
Bridge
State
(1)
Description
SB1 (3V3_PER)
ON
Peripheral power 3V3_PER is connected to 3V3.
OFF
Peripheral power 3V3_PER is not connected.
SB2 (3V3)
ON
Output of voltage regulator ST1L05CPU33R is connected to
3V3.
OFF
Output of voltage regulator ST1L05CPU33R is not
connected.
SB80 (1V8_VDD)
ON
Output of voltage regulator ST1L05BPUR is connected to
1V8_VDD.
OFF
Output of voltage regulator ST1L05BPUR is not connected.
SB6
ON
Input of voltage regulator ST1L05BPUR is connected to
3V3_VDD.
OFF
Input of voltage regulator ST1L05BPUR is not connected.
SB12, SB19 (ST-LINK-
USART)
ON
PG9 and PG14 on ST-LINK STM32F723IEK6 are connected
to PD8 and PD9 to enable virtual COM port for Mbed support.
Thus PD8 and PD9 on ST morpho connectors cannot be
used.
OFF
PG9 and PG14 on ST-LINK STM32F723IEK6 are
disconnected to PD8 and PD9 on STM32H7.
JP1 (ST-LINK_RST)
OFF
No incidence on ST-LINK STM32F723IEK6 NRST signal.
ON
ST-LINK STM32F723IEK6 signal is connected to GND
(ST-LINK reset to reduce power consumption).
SB32
(SWO)
ON
SWO signal of the STM32H7 (PB3) is connected to ST-LINK
SWO input.
(SB26 must be removed)
OFF
SWO signal of STM32H7 is not connected.
JP3
(NRST)
ON
Board RESET signal (NRST) is connected to ST-LINK reset
control I/O (T_NRST).
OFF
Board RESET signal (NRST) is not connected to ST-LINK
reset control I/O (T_NRST).
SB10, SB11, SB20
(IOREF)
OFF, ON,
OFF
IOREF is connected to VDD_MCU.
ON, OFF,
OFF
IOREF is connected to 3V3_PER.
OFF, OFF,
ON
IOREF is connected to 3V3.
SB14 (SDMMC_D0),
SB15 (SDMMC_D1)
ON
These pins are connected to ST morpho connector CN12.
OFF
These pins are disconnected from ST morpho connector
CN12 to avoid stub of SDMMC data signals on PCB.
