STMicroelectronics STM32F405, Reference Manual

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RM0090 Analog-to-digital converter (ADC)
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13.4 Data alignment
The ALIGN bit in the ADC_CR2 register selects the alignment of the data stored after
conversion. Data can be right- or left-aligned as shown in
Figure 48 and Figure 49 .
The converted data value from the injected group of channels is decreased by the user-
defined offset written in the ADC_JOFRx registers so the result can be a negative value.
The SEXT bit represents the extended sign value.
For channels in a regular group, no offset is subtracted so only twelve bits are significant.
Figure 48. Right alignment of 12-bit data
Figure 49. Left alignment of 12-bit data
Special case: when left-aligned, the data are aligned on a half-word basis except when the
resolution is set to 6-bit. in that case, the data are aligned on a byte basis as shown in
Figure 50 .
Figure 50. Left alignment of 6-bit data
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