Star Micronics TUP400 Series, Technical Manual

Page: 71 / 80

– 71 –
10. Parallel Interface Board (Ver. 1)
10-1. Circuit Diagram
CN3
INIT
DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8
STROBE
BUSY
ACK
ERROR
SLCT
PE
SLCT-IN
CPL
VCC
GND
EXT-GND
RETURN-GND
F-GND
MOUNT-HOLE
57RE-40360-BD29
VR1 EVN-D2A-10K
TR1 FA1A4P
CN2
PSW
PEXT 1 PEXT 2
VEXT VEXT
F-GND
MOUNT-HOLE
52065-6645
6 2 5 3 4 1 0
CN1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20
B1 B2 B3 B4 B5 B6 B7 B8 B9
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20
VVR DIN1 DIN3 DIN5 DIN7 GND VCC ERROR /SLCT /BUSY STB GND ID0 ID2 GND PEXT 1 VEXT
VCC
GND DIN2 DIN4 DIN6 DIN8 GND VCC /INIT /PE ACK GND ID1 GND PSWIN PEXT 2 VEXT
VCC
PHEC40P-R111
2
VCC
C2 220U 6.3V
+
VCC
3 1
C3 1000P
R2 R3 R4 R5 R6 R7 R8 R9
R1 1K
VCC
VCC
1
RA2 1.8K
×
6
23
4
5
6
7
VCC
1
RA1 4.7K
×
8
45
6
7
8
9
23
–30
VCC
L1 B-01R
C1 0.1U
31
2 3 4 5 6 7 8 9 1
11 10 32 13 12 36 34 18 16 33 19 17
0
VCC
R10 10K
4.7K
×
8
R11 100
C
D
B
F E
65
12
13
89 43
10
11
IC1 LS05
VCC
C4 0.1U (IC1)
A
IC1
21
LS05