Hardware
layout and configuration
UM2163
20/30
DocID030224 Rev 1
The main issues in this PCB design are the capacitance values necessary to ensure good
filtering and the effective decoupling between the low voltage inputs (IN1, IN2, IN3, IN4 and
EN for each channel) and the HV switching signals (XDCR, HVOUT, etc.), which is
ensured by the implemented layer separation.
3.5
Operating supply conditions
Table 5: DC working supply conditions
Operating supply voltages
Symbol
Parameter
Min.
Typ.
Max.
Value
V
DD
Positive supply voltage
5
6
10
V
V
SS
Negative supply voltage
-5
6
-10
V
HVP0
TX0 high voltage positive supply
95
V
HVP1
TX1 high voltage positive supply
95
V
HVM0
TX0 high voltage negative supply
-95
V
HVM1
TX1 high voltage negative supply
-95
V
The high voltage pins must be HVP0 ≥ HVP1 and HVM1 ≥ HVM0
Summary of Contents for UM2163
Page 17: ...UM2163 Hardware layout and configuration DocID030224 Rev 1 17 30 Figure 13 Program 4...
Page 27: ...UM2163 PCB layout DocID030224 Rev 1 27 30 Figure 25 Inner layer 2 Figure 26 Inner layer 3...
Page 28: ...PCB layout UM2163 28 30 DocID030224 Rev 1 Figure 27 Inner layer 4 Figure 28 Bottom layer...
