UM2163
Hardware
layout and configuration
DocID030224 Rev 1
13/30
Figure 9: Program 2 scheme
Table 2: Program 2
PW TX0 & TX1 5 pulses - HV0/1 = ± 60 V; LOAD: 270 pF//100 Ω
Mode Frequency (MHz)
Number of pulses
Initial pulse H-bridge
PRF
Ch A PW
5
5
positive
TX0 & TX1
150 µs
Ch B PW
5
5
negative
TX0 & TX1
150 µs
Ch C PW
10
5
positive
TX0 & TX1
150 µs
Ch D PW
10
5
negative
TX0 & TX1
150 µs
Summary of Contents for UM2163
Page 17: ...UM2163 Hardware layout and configuration DocID030224 Rev 1 17 30 Figure 13 Program 4...
Page 27: ...UM2163 PCB layout DocID030224 Rev 1 27 30 Figure 25 Inner layer 2 Figure 26 Inner layer 3...
Page 28: ...PCB layout UM2163 28 30 DocID030224 Rev 1 Figure 27 Inner layer 4 Figure 28 Bottom layer...
