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STMicroelectronics Confidential
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AN1290
TDA911x Family Pin Review
3
TDA911x Family Pin Review
The main features of the TDA9112, TDA9113, TDA9115 and TDA9116 are described in
.
The additional features for the TDA9112A are given in
Section 2: Special Features of the
Table 2: TDA911x Pin Descriptions (Sheet 1 of 2)
Pin No.
Pin Description
1
Receives Horizontal or Composite sync signals (TTL compatible, threshold approximately 1.4V, any polarity).
2
Receives separate V sync signals (same level as pin 1, any polarity).
Warning! The functionality of pins 1 and 2 may be affected by I²C.
3
Provides an early V blanking signal (amplitude 1V, High = Blank) to be ORed with V retrace ; combined with an H
Lock/Unlock signal (amplitude 5V, High = Unlocked).
Warning! Blanking and H Lock/Unlock functions are programmable through I²C.
4
Should be filtered to HGND, it improves H Jitter by filtering the H oscillator peak level.
5
(PLL2 filter) should be filtered to HGND (typical value 22nF), it improves jitter by filtering the level at which the
scanning is triggered.
6
The oscillator capacitor Co (typically 820pF) is connected between Pin 6 and HGND. A sawtooth at H frequency will
appear on this pin.
7
HGND; to be connected to General Ground pin 27 and to the components of H section only.
8
The oscillator resistor Ro (typically 5.2k
Ω
) is connected between Pin 8 and HGND. Co·Ro sets the free-running
frequency as Fo = 0.1215 / (Co·Ro). Voltage on pin 8 is always the same as on Pin 9.
9
The PLL1 loop filter is connected between pin 9 and HGND: 10nF to HGND, and in parallel: 1.8k
Ω
in series to 4.7µF
electrolytic. The electrolytic sets the speed of H-frequency change when sending a new video mode; the other
components are critical for H jitter characteristics. Voltage on pin 9 is proportional to H Oscillator frequency.
10
Should be filtered to HGND, it improves H jitter by filtering the DC level for H position. Capacitor on pin 10 also sets
the time constant for soft-start.
11
Output pin for composite dynamic H/V Focus (or Brightness). The waveform on this pin is the sum of two parabolas,
one at horizontal frequency, one at vertical frequency. The internal structure is NPN emitter-follower; a pull-down
resistor (10k
Ω
) is recommended.
The TDA9113 has an H-frequency parabola only.
On the TDA9115 and the TDA9116, dynamic focus is absent, H-Moire compensation is available in the place. To use
it, connect pin 11 to HGND through a resistor divider with ratio of 1000 to 2000, connect the low side of PLL2
capacitor to the middle point (rather than to HGND).
Warning! In the TDA9116, H Moire is I²C-programmable as either external (available on pin 11) or internal; in latter
case, pin 11 is a DAC with a voltage range between 0 and 5V.
12
H Flyback input, a voltage comparator (the base of a NPN transistor with emitter grounded). It should be connected to
a positive H flyback pulse; a resistor connected in series is necessary to limit the input current to less than 5 mA while
the pulse is positive.
13
Reference voltage, 8V nominal, to be filtered versus HGND. Since there is no reference voltage dedicated to the
Vertical section, pin 13 should also be used for biasing the non-inverting input of vertical booster through a suitable
resistor bridge.
14
Output of the op-amp that amplifies the error signal of the DC/DC converter feedback loop. Its voltage sets the current
level (represented by voltage on pin 16) at which the power MOS transistor will switch OFF.
15
Inverting input of the same op-amp.The feedback elements (typically 1M
Ω
parallel to 10nF) should be connected
between pins 14 and 15. The op-amp non-inverting input is not available; it is internally biased by a 4.8V reference
voltage, adjustable through I²C (except the TDA9115).