DocID030511 Rev 1
19/69
UM2198
Hardware layout and configuration
68
Note:1
I
2
C address of WM8994ECS/R is 0b0011010.
Note:2
PDM clock is on PE2 and it conflicts with SAI_CLK on PE2 by default. When PDM and SAI
functions are used at the same time, SB57 must be removed and SB56 must be closed to
move SAI_CLK to PG7.
8.9
USB OTG1 FS
The STM32H743I-EVAL Evaluation board supports USB OTG1 full-speed communication
through a USB Micro-AB connector (CN18) and USB power switch (U18) connected to
V
BUS
. The Evaluation board can be powered by this USB connection at 5 V DC with 500 mA
current limitation.
Table 8. Audio related switch and jumper
Switch/
Jumper
Description
SW2
Digital microphone is connected to the audio codec when SW2 is set as shown to
the right (Default setting):
Digital microphone is connected to the DFSDM port of STM32H743XI when SW2 is
set as shown to the right:
Digital microphone is connected to the PDM port of STM32H743XI when SW2 is set
as shown to the right:
JP12
Digital microphone power source is connected to +3.3 V power when JP12 is set as
shown to the right (Default setting):
Digital microphone power source is connected to MICBIAS1 from WM8994ECS/R
when JP12 is set as shown to the right:
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from