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Revision history

Table 10. 

Document revision history

Date

Version

Changes

01-Feb

-2018

1

Initial release.

UM2342

UM2342

 - 

Rev 1

page 50/57

Summary of Contents for PCC020V1

Page 1: ...rogram the STNRG IC without need of mains The associated GUI allows monitoring the status of the digital controller in real time and tuning specific parameters according to customers needs Figure 1 ST...

Page 2: ...story are stored Figure 2 Customer typical application Figure 3 STNRG011 in demo debug configuration shows the STNRG011 on the STEVAL PCC020V1 interface board or during debug configuration In the latt...

Page 3: ...he mains as they are located on the offline converter primary side Important This adapter board is exclusively designed to interface with STNRG011 products In the final customer application the tasks...

Page 4: ...Windows XP Windows 7 NET 4 0 framework needed Real time monitoring of the digital controller status Access to STNRG011 NVM parameters Access to STNRG011 external E PROM for patch upload calibration an...

Page 5: ...e isolation among the PC and the target sides U5 generates two supplies loosely regulated 5 V and 20 V 3 3 1 MCU subsystem supply 5 V The 5 V supply is later converted to a stable and clean 3V3 thanks...

Page 6: ...using a PWM enable signal which limits the current on the upfront DC DC When VCC has reached a stable value that is the VCC capacitor is charged the enable signal remains in the steady state conditio...

Page 7: ...ise up to 1 MHz maximum speed allowed by the STNRG011 The STM32F3 allows bidirectional communication between the PC and the target device through the UART to I C conversion Conversion between the host...

Page 8: ...d status LEDs Table 1 STEVAL PCC020V1 LEDs ON OFF blinking state D1 D2 D3 D4 ON OFF ON Blinking ON Blinking ON OFF VCP recognized by the PC VCP not recognized inactive Normal operation Firmware error...

Page 9: ...her through the 6 wire flat cable Step 3 Connect the offline converter to the load Step 4 Connect the mains Caution You should never plug or unplug the interface board while the connection is running...

Page 10: ...rsion of the drivers at SiLabs When the interface board is plugged to the PC the driver is automatically installed 5 2 GUI installation Procedure Step 1 Launch HVDPS STNRG011 Setup msi Step 2 Follow t...

Page 11: ...011 GUI startup screen The GUI is split in the following areas 1 Menu Bar used to select the operation mode i e to communicate with STNRG011 display logs access E2P directly NVM programming etc 2 Mete...

Page 12: ...the microcontroller has been detected the GUI displays the associated hardware and firmware version and build date Note If the GUI does not find a SiLabs based VCP an error message appears Check in t...

Page 13: ...Figure 13 SiLabs VCP in the Device Manager 6 4 GUI settings You can access GUI settings through the Application Settings menu UM2342 GUI settings UM2342 Rev 1 page 13 57...

Page 14: ...s from STNRG011 Option to log the UART exchange on a file uart_trace txt on the GUI executable directory STNRG011 M24C32 E2P address Hardware address of the external E2P STNRG011 is always assuming 4...

Page 15: ...tween each GUI refresh Concatenate commands 1 Messages sent to STNRG are concatenated to avoid USB overhead Write1 Write2 Read1 Read2 instead of Write1 Read1 Write2 Read2 STNRG011 periodic polling Per...

Page 16: ...ation ratio at low power only Some flags about temporary PFC faults Deep DCM PFC_OCP1 etc Figure 15 GUI metering information panel Note If STNRG011 power messages are disabled the boxes shown above ar...

Page 17: ...e stored in an 8 position circular buffer hence only the last 8 faults are stored At each power up the STNRG011 sends the content of the fault history which is a sort of black box to the host The GUI...

Page 18: ...ustomer factory field not used by firmware nor GUI Vout2 Vout3 Vout4 Calibration Data PFC Voltage Customer factory field not used by firmware nor GUI Wattage L_Param PFC inductance used by the power c...

Page 19: ...the actual power consumption As a lot of parameters have to be taken into account a very simple approach is to use a calibration method for each PFC operating mode The output power is also compensate...

Page 20: ...power meter in the Ref Pwr box Step 3 Press the Normalize button The GUI automatically computes and updates the correction factor associated to the current PFC operating mode The power displayed in t...

Page 21: ...G011 supply Self supplied External supply NVM write No Yes Note It is also possible to enable the ATE protocol in running mode for bidirectional communication This requires a specific patch to enable...

Page 22: ...atus bar Note The GUI prevents accessing ATE mode or forcing VCC when it detects the STNRG011 is running in normal mode The main power supply must be switched off before entering ATE mode Figure 23 GU...

Page 23: ...gure 25 Autobaud menu and results Note The computed speed is not updated in the Application Settings menu 9 4 NVM options In the ATE mode NVM operations are accessible via the Tools menu Figure 26 NVM...

Page 24: ...ored Export NVM to disk writes the current NVM on disk INIT format Note Writing NVM parameters is only possible in ATE mode 9 5 2 How to change parameters Procedure Step 1 Click on the parameter to ed...

Page 25: ...idate the change Once the parameter has been changed and is different from the current NVM it is highlighted in yellow Step 4 Click the Write to IC button to program the NVM memory UM2342 NVM editor U...

Page 26: ...a consequence STNRG011 metering messages must be disabled but this is only possible if UART uplink communication is enabled Otherwise E P must be accessed while STNRG is disabled e g no mains or exter...

Page 27: ...mage operation box This tab button allows reading the full E P image and save it to disk computing E P checksum comparing E P to an existing image writing the entire E P using an image previously save...

Page 28: ...format is supported Step 2 Tick the associated Check box Step 3 Press the Write Patch button Figure 32 E P full import export and patch operation tab 10 3 E P parameter editor This feature allows edit...

Page 29: ...e overwritten Figure 33 E P parameter editor tab 10 4 Additional tools The GUI embeds some additional tools useful during the power supply integration phase 10 4 1 PSU monitor Note A specific patch is...

Page 30: ...measured Tsw Meas PI Algo Ton Ton added computed by power integration algorithm Smed01 Tdel Duration between PFC pulsed DCM mode only Skipping Area PWM applied to PFC during a semi cycle at low power...

Page 31: ...ation the THD improver parameters The PFC supports five different modes DCM low power 3 2 1 ValleySkipping and TM high power The mode change is based on the estimated output power and the switching pe...

Page 32: ...ot a warning is displayed as shown in the figure below inviting the user to update NVM accordingly Important You can override the warning but it is under your own responsibility Figure 35 PFC protecti...

Page 33: ...ting the various steps to be followed during the calibration Figure 37 Main PFC tuning tab 11 4 2 Mode of operation You have to choose the operating mode manual or not and the power supply characteris...

Page 34: ...transfers the content of the chip NVM memory to the GUI This is useful to revert to the original calibration stored in the NVM if the current calibration is not satisfactory The Write NVM button is us...

Page 35: ...the other To compute the delta pin calibration the GUI disables PFC mode change on the basis of the frequency and power values forces the PFC mode and records the associated estimated power repeates...

Page 36: ...the GUI PFC mode change is enabled on the basis of the PFC frequency mode change based on the estimated power is disabled The output power is swept across the operating range Switching frequency is m...

Page 37: ...re after the peak of AC cycle like PWM This improves the overall efficiency but obviously degrades the THD PF figures for this reason it has to be performed at low power The threshold is up to the cus...

Page 38: ...nal verification the GUI enables PFC mode change both PFC frequency and estimated power based as the normal mode disables skipping area mode focus is on mode changes sweeps the DC load across all the...

Page 39: ...te Once you are satisfied with the PFC calibration performance you can update the NVM to make the parameters permanent by simply clicking the Write to NVM button Figure 48 PFC tuning writing NVM value...

Page 40: ...it means an overcurrent occurred and the fuse has blown Step 3 Replace the fuse 0 5 A after trying to fin out the root cause 12 2 USB yellow LED shutdown in few seconds The yellow LED D1 is wired to t...

Page 41: ...t Step 3 go to the Power Management tab Step 4 untick the Allow the computer to turn off this device to save power box Figure 50 Disabling CP2102 USB suspend mode UM2342 USB yellow LED shutdown in few...

Page 42: ...n low profile connector J3 The signals are also available on a 4 pin HE10 header J4 Figure 51 STEVAL PCC020V1 interface board signal connectors Table 8 STEVAL PCC020V1 J3 and J4 pinout Signal 4 pin he...

Page 43: ...EVAL PCC020V1 interface board firmware update menu Figure 53 STEVAL PCC020V1 interface board firmware update window Figure 54 STEVAL PCC020V1 interface board firmware update in progress UM2342 Firmwar...

Page 44: ...35 1 USB_VC C 1 USBD M 2 USBD P 3 USB_GN D 5 SHEL L 6 SHEL L 7 SHEL L 8 ID 4 SHEL L 9 U 3 C P210 2 DC D 1 R I 2 GN D 3 D 4 D 5 VD D 6 REG IN 7 VBU S 8 RS T 9 NC 10 SUSPEN D 11 SUSPEN D 12 NC 13 NC 14...

Page 45: ...S 5 I O2 4 4 I O1 6 6 I O2 3 3 D 5 BAS 1 6 R 1 3 100 R R 7 330R C 1 8 100 N F R 1 9 390 K C 1 9 100 N F R 9 330R R 8 100 K J 2 J U M PE R 2 1 2 R 1 5 N P S T M 32 F 373 C 8 T 6 U 9 BOOT0 44 NRS T 7 P...

Page 46: ...13 4 Layout Figure 57 STEVAL PCC020V1 interface board layout top view UM2342 Layout UM2342 Rev 1 page 46 57...

Page 47: ...5 C6 2 2 F 6 3 V X5R 0603 Ceramic capacitors TDK C1608X5R0J225M080AB 4 2 C7 C10 1 F 16 V X5R 0603 Ceramic capacitors TAIYO YUDEN EMK107BJ105KA T 5 2 C8 C13 10 F 25 V X5R 1206 Ceramic capacitors Murata...

Page 48: ...1 R5 4 7 K 5 1 10 W SMD 0603 Resistor Any 23 1 R8 100 K 1 10 W SMD 0603 Resistor Any 24 2 R10 R11 100 pF 50 V COG 0603 Resistors Murata GRM1885C1H101JA01D 25 2 R12 R13 100 R 5 1 10 W 0603 Resistors Pa...

Page 49: ...TR 38 1 U8 100 mAh LM2931D R SO8 Very low drop voltage regulators with inhibit function ST LM2931D R 39 1 U9 STM32F373C8T6 LQFP48 Mainstream mixed signals MCUs ARM Cortex M4 core ST STM32F373C8T6 40 1...

Page 50: ...Revision history Table 10 Document revision history Date Version Changes 01 Feb 2018 1 Initial release UM2342 UM2342 Rev 1 page 50 57...

Page 51: ...VCC monitoring 7 4 Using the board 8 4 1 Board connectors LEDs and buttons 8 4 2 How to connect the STEVAL PCC020V1 interface board to the offline converter 8 5 Software installation 10 5 1 Virtual CO...

Page 52: ...26 10 1 E P dump 26 10 2 E P patch and image upload download 27 10 2 1 Full E P image operation box 27 10 2 2 Patch programming box 27 10 3 E P parameter editor 28 10 4 Additional tools 29 10 4 1 PSU...

Page 53: ...o LED activity detected on the STEVAL PCC020V1 interface board 40 12 2 USB yellow LED shutdown in few seconds 40 13 STEVAL PCC020V1 interface board hardware 42 13 1 Connector pinout 42 13 2 Firmware u...

Page 54: ...on 18 Table 4 Differences between normal and ATE modes 21 Table 5 E P mapping 27 Table 6 PSU monitor PFC LLC features 30 Table 7 PFC parameters to be calibrated 31 Table 8 STEVAL PCC020V1 J3 and J4 pi...

Page 55: ...s 23 Figure 26 NVM operations menu 23 Figure 27 NVM editor window 24 Figure 28 Parameter change 24 Figure 29 E P simultaneous access conflicts on UART I C link 26 Figure 30 E P operation menu 26 Figur...

Page 56: ...firmware update in progress 43 Figure 55 STEVAL PCC020V1 circuit schematic USB power 44 Figure 56 STEVAL PCC020V1 circuit schematic MCU 45 Figure 57 STEVAL PCC020V1 interface board layout top view 46...

Page 57: ...the choice selection and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products No license express or implied to any intellectual property righ...

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