XAV-AX150
57
Sony CONFIDENTIAL
For Authorized Servicer
DISPLAY BOARD IC1301 ML86241LAZA7FL (DISPLAY CONTROLLER)
Pin No.
Pin Name
I/O
Description
A1
DGND
-
Ground terminal (for digital system)
A2, A3
VDA19, VDA22
I
Digital video signal input terminal Not used
A4
VCLKA
I
Digital video clock signal input terminal Not used
A5
VCLKB
I
Digital video clock signal input from the multimedia interface
A6, A7
VDB22, VDB18
I
Digital RGB video signal (green) input from the multimedia interface
A8, A9
VDB13, VDB8
I
Digital RGB video signal (blue) input from the multimedia interface
A10, A11
VDB4, VDB1
I
Digital RGB video signal (red) input from the multimedia interface
A12
DGND
-
Ground terminal (for digital system)
B1 to B3
VDA18, VDA17, VDA21
I
Digital video signal input terminal Not used
B4
VVSA
I
Digital video vertical sync signal input terminal Not used
B5
VVSB
I
Digital video vertical sync signal input from the multimedia interface
B6, B7
VDB21, VDB17
I
Digital RGB video signal (green) input from the multimedia interface
B8
VDB12
I
Digital RGB video signal (blue) input from the multimedia interface
B9 to
B11
VDB7, VDB3, VDB0
I
Digital RGB video signal (red) input from the multimedia interface
B12
DCLK
I
Digital video clock signal input terminal Not used
C1 to C3
VDA16, VDA15, VDA20
I
Digital video signal input terminal Not used
C4
VHSA
I
Digital video horizontal sync signal input terminal Not used
C5
VHSB
I
Digital video horizontal sync signal input from the multimedia interface
C6, C7
VDB20, VDB16
I
Digital RGB video signal (green) input from the multimedia interface
C8
VDB11
I
Digital RGB video signal (blue) input from the multimedia interface
C9, C10
VDB6, VDB2
I
Digital RGB video signal (red) input from the multimedia interface
C11
DHS
O
Digital video horizontal sync signal output to the liquid crystal display
C12
DVS
O
Digital video vertical sync signal output to the liquid crystal display
D1, D2
VDA14, VDA13
I
Digital video signal input terminal Not used
D3
DVDD_IOR
-
Power supply terminal (+3.3V) (for digital system)
D4
VDA23
I
Digital video signal input terminal Not used
D5, D6
VDB23, VDB19
I
Digital RGB video signal (green) input from the multimedia interface
D7, D8
VDB15, VDB10
I
Digital RGB video signal (blue) input from the multimedia interface
D9
VDB5
I
Digital RGB video signal (red) input from the multimedia interface
D10, D11
DY7, DY6
O
Digital video signal output terminal Not used
D12
DY5
O
Output enable signal output to the liquid crystal display
E1, E2
VDA12, VDA11
I
Digital video signal input terminal Not used
E3
DGND
-
Ground terminal (for digital system)
E4, E5
QSD3, QSD2
I/O
Two-way serial data bus with the serial
fl
ash
E6
DVDD_C
-
Power supply terminal (+1.5V) (for digital core)
E7, E8
VDB14, VDB9
I
Digital RGB video signal (blue) input from the multimedia interface
E9
DY4
O
Polarity selection signal output to the liquid crystal display
E10 to
E12
DY3 to DY1
O
Digital video signal output terminal Not used
F1, F2
VDA10, VDA9
I
Digital video signal input terminal Not used
F3, F4
QSD1, QSD0
I/O
Two-way serial data bus with the serial
fl
ash
F5
QSCS
O
Chip select signal output to the serial
fl
ash
F6
DVDD_C
-
Power supply terminal (+1.5V) (for digital core)
F7, F8
DGND
-
Ground terminal (for digital system)
F9
DY0
O
Digital video signal output terminal Not used
F10
DE
O
Data enable signal output terminal Not used
F11
LCP
O
Horizontal sync signal output to the liquid crystal display
F12
FRP
O
Vertical sync signal output to the liquid crystal display
G1
RESETN
I
Reset signal input from the system controller “L”: reset
G2
QSCK
O
Serial data transfer clock signal output to the serial
fl
ash
G3 to G5
VDA2 to VDA0
I
Digital video signal input terminal Not used
G6
DVDD_IOR
-
Power supply terminal (+3.3V) (for digital system)
G7
DVDD_IOT
-
Power supply terminal (+3.3V) (for digital system)
G8
PWM
O
PWM signal output to the DC/DC converter
G9
CP
O
Clock signal output to the liquid crystal display
G10
DVDD_IOT
-
Power supply terminal (+3.3V) (for digital system)
G11, G12
DB7, DB6
O
Digital RGB video signal (blue) output to the liquid crystal display
H1
XOSCI
I
System clock input terminal (25 MHz)
SYS SET
2020/02/07 23:51:10 (GMT+09:00)