– 23 –
Pin No.
Pin name
I/O
Description
1
BEEP
O
Beep output terminal.
2
V
SS
–
Ground.
3
OSC1
I
Internal oscillator. 4.048MHz.
4
OSC2
O
External oscillator. 4.048MHz.
5
V
DD
–
Power supply terminal (+4V).
––––––
6
RESET
I
Reset. L : Reset
7
XT1
I
Oscillator terminal (32kHz).
8
XT2
O
Oscillator terminal (32kHz).
9
TEST
–
Test (V
SS
).
––––––
10
HOLD
I
Power interruption detection. H : Hold
11 – 14
ROW 1–4
O
Key output terminal.
15
(TEST IO)
I/O
Test terminal. H : Test mode
16
COL1
I
Key input terminal.
17
COL2
I
Key input terminal.
18
KEYINT. COL3
I
Key input terminal.
–––––––
19
L2 LED
O
LINE 2 LED control. Lighting : L, No light : H
––––
20
LED
O
LOW LED control. Lighting : L, No light : H
––––––
21
L1 LED
O
LINE 1 control. Lighting : L, No light : H
––––––––
22
PLL LDA
I
PLL serial output terminal.
23
––––––
–
Not used (OPEN).
24
PLL CLK
O
PLL serial clock output terminal.
25
PLL DI
O
PLL serial data output terminal.
26
PLL CE
O
PLL serial chip enable output terminal.
27 – 30
ROW5 – 8
O
Key output terminal.
31
10CH/25CH
I
10CH/25CH auto scanning mode select. H : 10CH, L : 25CH
––––––––––
32
BATT LOW
I
Battery low level detection. L : Battery Low
33
VREG
O
Regulator output.
34
SQ DET
I
Carrier detection. H : Carrier present
–––––––––
35
VDET ON
O
Voltage detection terminal.
36
CHG DET
I
Charge detection terminal. L : Charge ON DET
––––––––––
37
P. VCC ON
O
P. VCC control.
38
BEEP ATT
O
Beep attenuator control terminal.
–––––––––
39
TX MUTE
O
TX mute output.
–––––––––
40
RX MUTE
O
RX mute output.
41
MODE SW. R/B
I
RING/BATT SAVE mode detection.
42
(TEST CLK)
I/O
Test CLK terminal.
––––––
43
RX +B
O
RX +B control.
44
(ROM IO)
I/O
EPPROM I/O. (Not used)
45
(ROM SK)
O
EPPROM SK. (Not used)
46
RX DATA
I
RX data input terminal.
47
BATT DET
I
Battery Low level detection.
48
TX DATA
O
TX data output terminal.
IC801 SH665316A-4G70 (HANDSET CPU)
Summary of Contents for SPP-M100
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