22
Pin No.
Pin Name
I/O
Description
50
ZDFLGR
O
Data (Rch) flag detect signal output terminal
51, 52
A0, A1
O
Address signal output to the D-RAM (IC625)
53
VDD
—
Power supply terminal (+3.3V)
54
VSS
—
Ground terminal
55 to 63
A2 to A10
O
Address signal output to the D-RAM (IC625)
64
NC
—
Not used (open)
65
VSS
—
Ground terminal
66
XWE
O
Write enable signal output to the D-RAM (IC625)
67
XCAS
O
Column address strobe signal output to the D-RAM (IC625)
68
XRAS
O
Row address strobe signal output to the D-RAM (IC625)
69
XOE
O
Read enable signal output to the D-RAM (IC625)
70 to77
DQ0 to DR7
I/O
Two-way data bus with the D-RAM (IC625)
78
VDD
—
Power supply terminal (+3.3V)
79
VSS
—
Ground terminal
80
WCK
I
Clock signal input terminal for disk mark detect
81
WRFD
I
RF data signal input terminal for disk mark detect
82 to 89 WAD0 to WAD7
I
A/D data signal input from the A/D converter (IC620) for disk mark detect
90
VSS
—
Ground terminal
91 to 98
SD7 to SD0
I
Stream data signal input from the RF signal decoder (IC622)
99
SDEF
I
Error flag signal input from the RF signal decoder (IC622)
100
XSAK
I
Data flag signal input from the RF signal decoder (IC622)
SCD-XB940
Summary of Contents for SCD-XB940
Page 5: ...5 SECTION 2 GENERAL This section is extracted from instruction manual ...
Page 6: ...6 ...
Page 7: ...7 ...
Page 10: ...10 TRAY 1 Remove the tray Careful of the claw claw claw ...
Page 17: ...17 17 SCD XB940 4 7 SCHEMATIC DIAGRAM MAIN Board 2 6 Page 16 Page 20 Page 21 Page 18 Page 21 ...
Page 33: ...33 2 IC203 ea EXTAL DISPLAY Board 1 IC201 tk OSCO 4 1 Vp p 484 ns 3 8 Vp p 8 MHz ...