NV-U74
42
Pin No.
Pin Name
I/O
Description
R24
VCC_CORE
-
Power supply terminal (+1.5V)
T1
MD23
I/O
Two-way data bus with the SD-RAM
T2
VCC_CORE
-
Power supply terminal (+1.5V)
T3
MD8
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
T4
VSS_MEM
-
Ground terminal
T21
TMS
I
Mode select signal input terminal for JTAG
T22
TCK
I
Clock signal input terminal for JTAG
T23
TESTCLK
I
Not used
T24
LCD_ON
O
Power supply on/off control signal output to the LED driver and liquid crystal display
“H”: power on
U1
MD7
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
U2
VCC_MEM
-
Power supply terminal (+3V)
U3
VSS_CORE
-
Ground terminal
U4
MD5
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
U21
XTRST
I
Reset signal input terminal for JTAG
U22
GPIO9
I
Not used
U23
TDI
I
Data input terminal for JTAG
U24
VSS_IO
-
Ground terminal
V1, V2
MD21, MD22
I/O
Two-way data bus with the SD-RAM
V3
MD6
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
V4
VSS_MEM
-
Ground terminal
V21
VSS
-
Ground terminal
V22
POWER_SW
I
Power switch input terminal
V23
LAN_INT
I
Interrupt signal input terminal Not used
V24
TDO
O
Data output terminal for JTAG
W1
MD20
I/O
Two-way data bus with the SD-RAM
W2
VCC_MEM
-
Power supply terminal (+3V)
W3
VCC_CORE
-
Power supply terminal (+1.5V)
W4
VSS_CORE
-
Ground terminal
W21
PWR_SCL
O
I2C clock signal output to the power control
W22
XVDD_FAULT
I
Power supply fault signal input from the power control and DC/DC converter
W23
PWR_SDA
I/O
Two-way I2C data bus with the power control
W24
CLK_REQ
I
Clock request signal input terminal Not used
Y1
MD19
I/O
Two-way data bus with the SD-RAM
Y2, Y3
MD4, MD3
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
Y4
VSS_MEM
-
Ground terminal
Y21
XRESET_OUT
O
Reset signal output to the NOR
fl
ash memory and memory stick controller “L”: reset
Y22
XRESET
I
System reset signal input from the power control “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
Y23
PWR_EN
O
Power supply on/off control signal output to the power control “H”: power on
Y24
XACC_IN
I
External power supply connection detection signal input terminal
“H”: external power supply is connected
AA1
MD18
I/O
Two-way data bus with the SD-RAM
AA2
VCC_MEM
-
Power supply terminal (+3V)
AA3
MD2
I/O
Two-way data bus with the SD-RAM and NOR
fl
ash memory
AA4
MD16
I/O
Two-way data bus with the SD-RAM
AA5
VSS_MEM
-
Ground terminal
AA6
XSDCAS
O
Column address strobe signal output to the SD-RAM
AA7
VSS_CORE
-
Ground terminal
AA8, AA9
VSS_MEM
-
Ground terminal
AA10
XPREG
O
REG signal output terminal Not used
AA11
CIF_FV
I
Input terminal for the setting
AA12
VSS_CORE
-
Ground terminal
AA13
VSS_BB
-
Ground terminal
AA14
CIF_PCLK
I
Input terminal for the setting
AA15
VSS_CORE
-
Ground terminal
AA16
VSS_IO
-
Ground terminal
Summary of Contents for NV-U74
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