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MHC-V3/V4D
62
IC302 W25Q32BVSSIG-R (ARAGON BOARD (2/6)) (V4D)
IC302 W25Q16CVSSIG-R (ARAGON BOARD (2/6)) (V3)
IC305 BU33TD3WG-TR (ARAGON BOARD (2/6)) (V4D)
IC306 M12L64164A-7TG2Y (ARAGON BOARD (2/6))
_CS
SO
_W
GND
1
2
3
4
Write Control
Logic
Data
Column Decode
and 256 Byte Page Buffer
Write Protect Logic and Row Decode
High Voltage
Generators
Page Address
Latch / Counter
SPI
Command and
Control Logic
Status
Register
VCC
8
_HOLD
7
SCK
6
SI
5
Byte Address
Latch / Counter
Clock
Generator
Address
Command Decoder
Control Logic
Mode
Register
Row
Address
Buffer
&
Refresh
Counter
Column
Address
Buffer
&
Refresh
Counter
Bank A
Bank B
Bank C
Bank D
Sense Amplifier
Row Decoder
Column Decoder
Data Control Circuit
Latch Circuit
Input & Output
Buffer
NC 40
UDQM 39
CLK 38
CLKE 37
NC 36
A11 35
A9 34
A8 33
A7 32
A6 31
A5 30
A4 29
VSS 28
VDD
27
VSS
41
DQ8
42
VDDQ
43
DQ9
44
DQ10
45
VSSQ
46
DQ11
47
DQ12
48
VDDQ
49
DQ13
50
DQ14
51
VSSQ
52
DQ15
53
VSS
54
A3
26
A2
25
A1
24
A0
23
A10/AP
22
BA1
21
BA0
20
CS
19
RAS
18
CAS
17
WE
16
LDQM
15
VDD
14
1 VDD
2 DG0
3 VDDQ
4 DQ1
5 DQ2
6 VSSQ
7 DQ3
8 DQ4
9 VDDQ
10 DQ5
11 DQ6
12 VSSQ
13 DQ7
+
–
VDD 1
GND 2
CE 3
VREF
OCP
TSD
STBY
Discharge
5 VOUT
4 NC
Ver. 1.5