– 80 –
– AUDIO Board –
IC901
RSC-164
1
57
58
59
60
61
62
63
64
49
50
51
52
53
55
56
6
2 3
5
4
EXTERNAL MEMORY
INTERFACE
ADC
MUX
DATA BUS
8
7
9
14
10 11
13
12
16
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
19
18
17
15
A15
A14
A13
A12
A11
A10
A9
A8
GND
VDD
A7
A6
A5
A4
A3
A2
A0
A1
P10
P11
P12
P13
P14
P15
P16
P17
VDD
GND
RESET
XI1
P07
DACOUT
XO1
D7
D6
D5
D4
D3
D2
D1
D0
AIN1
AIN0
AGND
BUFOUT/PWM0
TEST/PWM1
AVDD
GND
SH
PORT 1
ADDRESS BUS
INTERNAL BUS
REGISTER
SPACE
STACK
SPACE
CPU
PORT 0
PULSE WIDTH
MODULATOR
TIMER
OSC
INTERNAL ROM
32 X 8 (HIGH)
INTERNAL ROM
32 X 8 (LOW)
WAKEUP LOGIC
(FROM PORT 0/1)
BUFFER
SLEEP
PON
WRD
RDD
WRC
RDC
GND
VDD
P00
P01
P02
P03
P04
P05
P06
XML
XMH
INTERRUPT
LOGIC
DAC
ADC
ANALOG
CONTROL
54
POWER
CONTROL
TIMING &
CONTROL
IC902
MBM29F800TA
CONTROL
CIRCUIT
LOW VCC
DETECTOR CIRCUIT
WRITE/ERASE
PULSE TIMER
ERASE CIRCUIT
RY/BY
BUFFER
CHIP ENABLE/
OUTPUT ENABLE
CIRCUIT
I/O
BUFFER
DATA
LATCH
ADDRESS
LATCH
Y
DECODER
8,388,608
CELL
MATRIX
Y GATE
WRITE CIRCUIT
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
DQ3
DQ11
VCC
DQ4
DQ12
DQ5
DQ13
DQ7
DQ14
DQ6
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
GND
CE
OE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
21
22
A8
A9
A15
A14
A13
A12
A11
NC
RY/BY
WE
A7
A6
A4
A5
NC
NC
RESET
NC
47
48
45
46
A3
A2
A1
A17
A10
X
DECODER
A16
BYTE
GND
DQ15/A–1
A0
STB
STB
A18
IC903
MSM534001E-14TSKFDR3
1
6
2 3
5
4
CE/OE
CONTROL
MEMORY CELL
MATRIX
524,288 X 8
X
DECODER
ADDRESS
BUFFER
Y
DECODER
MULTIPLEXER
OUTPUT
BUFFER
OE
A10
CE
D7
D6
D5
D4
D3
VSS
D2
D1
D0
A0
A1
A2
A3
8
7
9
14
10 11
13
12
16
15
32
27
31 30
28
29
25
26
24
19
23 22
20
21
17
18
A11
A9
A8
A13
A14
A17
A18
VCC
NC
A16
A15
A12
A7
A6
A5
A4
Summary of Contents for MDX-C8900R
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Page 51: ... 71 MDX C8900R 4 22 SCHEMATIC DIAGRAM RELAY Section Page 60 Page 67 ...