- 33 -
11
22
Q
O
P
A
B
C
D
E
F
G
H
J
I
K
L
M
N
12
13
14
15
16
17
18
19
20
21
DQ[0-15]
DADD[0-12]
DBA0,DBA1,DCASB,DCKE,DCLKB,DCLK_DDR,DCSB,DQM0,DQM1,DQS0,DQS1,DRASB,DVREF,DWEB
JL5630
JL5637
XX
R5649
JL5636
XX
R5651
JL5635
JL5633
JL5634
R5648
XX
E
5
E17
F
5
F
1
7
G
5
G
1
7
T17
U
5
U
6
U
1
7
E
8
E
9
E10
E11
E12
E13
E
6
E
7
E14
E
A16
B16
A15
B15
A14
B14
A13
B13
D13
C13
D14
C14
D15
C15
D16
C16
D12
A9
B9
D8
A8
B8
A7
B7
A6
B6
D6
C6
D7
C7
C8
D9
A11
A12
C11
C12
C9
D10
C10
D11
B10
A10
B11
B12
Y17
W17
V17
AA17
AA16
Y16
W16
V16
AA15
A1
B2
A2
B3
A3
C4
B4
A4
A5
D5
F4
N4
P2
G2
R2
G1
K3
V1
C1
Y1
P3
B1
E4
F2
H1
IC5630
XX
DQ15
A16
DQ14
B16
DQ13
A15
DQ12
B15
DQ11
A14
DQ10
B14
DQ9
A13
DQ8
B13
DQ7
D13
DQ6
C13
DQ5
D14
DQ4
C14
DQ3
D15
DQ2
C15
DQ1
D16
DQ0
C16
DADD13
D12
DADD12
A9
DADD11
B9
DADD10
D8
DADD9
A8
DADD8
B8
DADD7
A7
DADD6
B7
DADD5
A6
DADD4
B6
DADD3
D6
DADD2
C6
DADD1
D7
DADD0
C7
DBA1
C8
DBA0
D9
UDQM
A11
UDQS
A12
LDQM
C11
LDQS
C12
DCSB
C9
DRASB
D10
DCASB
C10
DWEB
D11
DCKE
B10
DCLK
A10
DCLKB
B11
DVREF
B12
VDI_D7 / PPORT121
Y17
VDI_D6 / PPORT120
W17
VDI_D5 / PPORT119
V17
VDI_D4 / PPORT118
AA17
VDI_D3 / PPORT117
AA16
VDI_D2 / PPORT116
Y16
VDI_D1 / PPORT115
W16
VDI_D0 / PPORT114
V16
VDI_VCK / PPORT113
AA15
STP0_DAT7 / PPORT8
A1
STP0_DAT6 / PPORT7
B2
STP0_DAT5 / PPORT6
A2
STP0_DAT4 / PPORT5
B3
STP0_DAT3 / PPORT4
A3
STP0_DAT2 / PPORT3
C4
STP0_DAT1 / PPORT2
B4
STP0_DAT0 / PPORT1
A4
STP0_EN / PPORT9
A5
STP0_CLK / PPORT0
D5
REGB / PPORT34
F4
IOWRB / PPORT31
N4
IORDB / PPORT30
P2
INPACKB / PPORT33
G2
GPIO_VS1B / PPORT28
R2
GPIO_RESET / PPORT32
G1
GPIO_IREQB / PPORT24
K3
GPIO_CD1B / PPORT26
V1
GPIO_CD2B / PPORT35
C1
PCE1B(CE2B_2) / PPORT36
Y1
PCE0B(CE2B_1) / PPORT27
P3
IOSI16B / PPORT25
B1
STP1_STRT / PPORT38
E4
STP1_EN / PPORT37
F2
STP1
CLK
/
PPORT29
H1
VDD3
E5
VDD3
E17
VDD3
F5
VDD3
F17
VDD3
G5
VDD3
G17
VDD3
T17
VDD3
U5
VDD3
U6
VDD3
U17
VDD2
E8
VDD2
E9
VDD2
E10
VDD2
E11
VDD2
E12
VDD2
E13
VDD1
E6
VDD1
E7
VDD1
E14
VDD1
IN_TSD[0-7]
INPACKB
CARD_RESET
IOWRB
REGB
VS1B
IORDB
IOIS16B
IN_TSBCLK
PMSINS
CD2B
nFE_RESET
IN_TSPVAL
IREQB
JIG_MODE
CD1B
XX
C5654
C5639
XX
XX
C5631
C5643
XX
C5644
XX
C5641
XX
XX
C5653
C5640
XX
XX
C5652
XX
C5655
XX
C5650
C5642
XX
XX
C5656
XX
C5651
FB5631
XX
3.3V_MAIN
+2V5D
+2V5D_DDR
XX
FB5636
BUF_MDO_STRT
BUF_MDO_EN
BUF
MDO
CLK
R5677
XX
XX
R5678
XX
R5662
XX
R9033
XX
R9034
3.3V_MAIN
XX
FB5618
XX
FB5619
XX
FB5620
XX
C5676
XX
C5703
XX
C5697
XX
C5702
XX
C5845
XX
C5602
JR5600
XX
XX
JR5601
XX
JR5602
XX
C5646
XX
R5679
XX
R5650
DQ[0]
DQ[1]
DQ[2]
DQ[3]
DQ[4]
DQ[5]
DQ[6]
DQ[7]
DQ[8]
DQ[9]
DQ[10]
DQ[11]
DQ[12]
DQ[13]
DQ[14]
DQ[15]
DADD[0]
DADD[1]
DADD[2]
DADD[3]
DADD[4]
DADD[5]
DADD[6]
DADD[7]
DADD[8]
DADD[9]
DADD[10]
DADD[11]
DADD[12]
DRASB
DCSB
DQS0
DQM0
DQS1
DQM1
DBA0
DBA1
DCKE
DWEB
DCASB
DCLKB
DCLK_DDR
DADD[13]
DVREF
IN_TSD[7]
IN_TSD[6]
IN_TSD[5]
IN_TSD[4]
IN_TSD[3]
IN_TSD[2]
IN_TSD[0]
IN_TSD[1]
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
DIFFERENTIAL PAIR
OF CLOCK SIGNALS
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
/ CTS1B
/ RTS1B
BOARD VERSION RESISTORS - MOUNT ON
SIDE-A WITH JL’S ON SIDE-B
OTHER
A A
ODM
B B
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
BDTR-2.SE1
BDTR-2
1 C / 9
~ BDTR-2 Board Schematic Diagram [ Main Microcontroller, Panel Driving, Audio & Video Processor ] Page 1C/9 ~
Summary of Contents for KDL-32U2520
Page 9: ... 8 SE 1 RM ED007 SECTION 2 DISASSEMBLY 2 1 STAND REMOVAL 2 2 REAR COVER REMOVAL ...
Page 10: ... 9 SE 1 RM ED007 2 3 SPEAKER REMOVAL 2 4 A1 BOARD REMOVAL ...
Page 12: ... 11 SE 1 RM ED007 2 7 H1 BOARD REMOVAL 2 8 H2 BOARD REMOVAL ...
Page 13: ... 12 SE 1 RM ED007 2 9 H3 BOARD REMOVAL 2 10 BRACKET REMOVAL ...
Page 14: ... 13 SE 1 RM ED007 2 11 LCD PANEL REMOVAL Six screws ...