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~ BC1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 2/14 ~
3.3V_MAIN
TP7215
10k
R7226
R7201
XX
100
R7231
JL7217
RESET_N
1k
R7235
FE_NAND_ALE
XX
R7216
10k
R7203
TP7213
FE_NAND_CLE
XX
C7217
TP7207
68
RB7205
1
2
3
4
5
6
7
8
470
R7206
JL7207
GND_1
TP7202
TP7220
JL7202
XX
C7215
JL7205
JL7220
0uH
FB7200
100
RB7207
1
2
3
4
5
6
7
8
1k
RB7204
2
1
4
3
6
5
8
7
TP7221
470
R7200
100
RB7211
1
2
3
4
5
6
7
8
RT1N141M-TP-1
Q7203
3.3V_MAIN
FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE
_DVREF,FE_DWEB
1005
1/16W
CHIP
5%
R7243
10k
0 . 0 1
C7231
TP7205
470
R7207
GND_1
FE_RDATA[0-7]
XX
R7210
FE_FOEB
3.3V_MAIN
TP7210
TP7201
C7219
XX
FE_NAND_RBB
5V_MAIN
JL7209
0 . 1
C7212
S
2SK2036(TE85L)
Q7201
15uH
L7200
XX
R7214
1k
R7204
XX
R7225
TP7216
100
R7232
0uH
FB7201
100
RB7210
1
2
3
4
5
6
7
8
FE_CVBS
GND_1
68
RB7212
1
2
3
4
5
6
7
8
TP7209
C7222
0 . 1
JL7223
0 . 1
C7203
XX
R7211
4.7k
R7208
XX
R7215
RF_DIGIT
AL
68
RB7206
1
2
3
4
5
6
7
8
100
R7229
Q7200
XX
C7213
0 . 1
C7200
0.1
C7208
XX
R7205
JL7203
FE_DQ[0-15]
TP7200
R7224
10k
10k
R7221
100
RB7208
1
2
3
4
5
6
7
8
TP7218
C7220
0 . 1
TP7211
R7202
1k
GND_1
TP7227
SCL
0 . 1
C7210
3.3V_MAIN
GND_1
FE_CLK27M
3.3V_MAIN
XX
C7216
1005
1/16W
CHIP
5%
R7242
10k
TP7206
TP7208
JL7216
JL7218
100
R7230
SCL_EMMA
0uH
FB7202
FE_FTV_CONFIG0
68
R7228
XX
R7222
JL7210
GND_1
0 . 1
C7226
GND_1
XX
C7214
SDA_EMMA
3.3V_MAIN
FE_+2V5_DDR
C7218
0 . 1
100
R7219
TP7219
27p
C7228
0 . 0 0 1
C7205
68
R7217
FE_FTV_CONFIG2
JL7219
FE_DADD[0-12]
68
RB7213
1
2
3
4
5
6
7
8
JL7208
GND_1
GND_1
TP7224
TP7204
0 . 1
C7227
JL7204
TP7222
FE_PWMOUT
TP7225
100
RB7209
1
2
3
4
5
6
7
8
XX
R7209
GND_1
XX
C7207
0 . 1
C7202
JL7211
XX
C7221
TP7217
JL7206
XX
R7220
R7234
220
3.3V_MAIN
FE_FTV_CONFIG1
3.3V_MAIN
FE_RADD[19-25]
GND_1
TP7203
TP7223
XX
R7212
FE_FWEB
TP7226
SDA
GND_1
RT1P431M-TP-1
Q7204
100
R7218
47
R7233
10k
R7223
68p
C7229
C7223
0 . 1
0 . 1
C7204
FE_CI_TSD[0-7]
XX
R7213
FE_FCSB0
XX
C7206
TP7214
GND_1
TP7212
GND_1
1k
R7227
0 . 1
C7234
1p
C7233
JL7222
1p
C7232
2
3
4
1
X7201
4.7
C7211
4 . 7
C7224
4 . 7
C7209
100
R7237
100
R7238
100
R7241
S
2SK2036(TE85L)
Q7202
XX
C7237
8
7
6
5
4
3
2
1
IC7202
X1
NC
VIN
GND
CLK
VDD
PD
X2
8765
4
3
2
1
PCA8563/T4
IC7203
OSCI
OSCO
INT
VSS
SDA
SCL
CLKOUT
VDD
1k
RB7214
2
1
4
3
6
5
8
7
1k
RB7215
2
1
4
3
6
5
8
7
1k RB7200
2
1
4
3
6
5
8
7
1k
RB7202
2
1
4
3
6
5
8
7
3.3V_STBY
KEY
SD
A
SCL
XX
C7238
XX
C7239
R7244
3 . 3 k
X7200
48
43
6
5
46
4
3
2
1
47
45
44
42
41
37
38
39
40
12
10
11
9
8
7
36
31
32
33
34
35
18
17
16
15
14
13
30
29
28
27
26
25
24
23
22
21
20
19
IC7200
NC
NC
NC
NC
NC
NC
RB
FOE
CE
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
NC
NC
NC
NC
I/O1
I/O2
IO/3
IO/4
NC
NC
NC
VSS
VCC
LOCKPRE
NC
NC
IO/5
IO/6
IO/7
IO/8
NC
NC
NC
NC
48
9
53
56
1
49
50
51
2
55
54
52
345678
47
10
46
45
44
43
42
11
12
13
14
15
41
40
39
38
37
36
35
16
17
18
19
20
21
22
34
33
23
24
32
25
31
30
29
26
27
28
57
58
59
60
61
62
63
64
65
66
IC7201
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
NC
LDM
WE
CAS
RAS
CS
NC
BS0
BS1
A10
A0
A1
A2
A3
DQ15
VSS
A4
A5
A6
A7
A8
A9
A11
A12
NC
CKE
CLK
CLK
UDM
VSS
VREF
NC
UDQS
VSSQ
NC
DQ8
VDDQ
DQ9
DQ10
VSSQ
DQ11
DQ12
VDDQ
DQ13
DQ14
VSSQ
VSS
VDD
100
C7225
47
C7235
1
C7201
XX
R7245
FE_DADD[7]
FE_DQ[2]
FE_DQ[15]
FE_DCLKB
FE_DQ[6]
FE_RDATA[3]
FE_DADD[1]
FE_DQ[4]
FE_DQ[3]
FE_RADD[23]
GND_1
FE_DQ[12]
FE_RDATA[4]
FE_RDATA[5]
FE_DADD[12]
FE_DCKE
FE_DWEB
FE_DADD[6]
FE_RDATA[5]
FE_DADD[0]
FE_RDATA[4]
FE_DADD[3]
FE_RDATA[2]
FE_DQ[7]
FE_DVREF
FE_DBA0
GND_1
FE_DADD[10]
FE_DCLK
FE_D
VREF
FE_DQ[10]
FE_RADD[21]
FE_RDATA[0]
FE_DQS1
FE_RDATA[1]
FE_RADD[24]
GND_1
FE_DQ[11]
FE_DCSB
FE_DQ[1]
FE_RADD[19]
FE_DQM0
FE_RDATA[2]
FE_RADD[22]
FE_DADD[2]
FE_RDATA[7]
FE_DADD[9]
FE_DADD[5]
FE_RDATA[6]
FE_RADD[25]
FE_RDATA[0]
FE_DADD[8]
FE_DBA1
FE_DCASB
FE_DQ[13]
FE_RADD[20]
GND_1
FE_DRASB
FE_RDATA[7]
FE_RDATA[3]
FE_DQM1
FE_DQ[8]
FE_CI_TSD[6]
FE_DADD[11]
FE_D
ADD[0-12]
FE_DQ[0]
FE_DQ[5]
FE_DQ[9]
FE_RDATA[6]
FE_DQS0
FE_DQ[14]
FE_DADD[4]
FE_RDATA[1]
FE_CI_TSD[5]
FE_CI_TSD[4]
FE_CI_TSD[7]
FE_CI_TSD[3]
FE_CI_TSD[0]
FE_CI_TSD[1]
FE_CI_TSD[2]
PLACE R7201 &
R7202 ADJACENT
BOARD VERSION RESISTORS - MOUNT ON
SIDE-A
0
PLEASE PLACE COMPONENTS IN
FTV_CONFIG2
DDR SDRAM
RESERVED
NAND FLASH
VRCLKSEL1
LEAVE N.C. SO NOT USED
BOOT_NAND_SEL_1
BOOTSEL1
LAYOUT NOTE:-
REMOVE GND PLANE AROUND AND UNDERNEATH IC7202
AND X7200 INCLUDING TRACKS FROM XTAL TO IC.
EJTAG_MODE
MCLKSEL1
0.5%
FTV_CONFIG0
0
0
OPTION #2
DINT_EN
TO FORCE "BOOT FROM MEMORY STICK",
CONNECT (SHORT) TP7207 TO TP7208, OR
CONNECT (SHORT) JL7200 TO JL7201
NOTE PIN 6 IS NOT GND ON SAMSUNG
NAND FLASH, ONLY TOSHIBA
FTV_CONFIG1
BOARD VERSION RESISTORS - MOUNT ON
SIDE-B WITH JL’S ON SIDE-B
VIDEO AMPS/BUFFERS
PLACE THESE CLOSE TO PIN 49 OF IC
NANDCS
PCIMODE
27MHZ CLOCK
RDATA[0] = 1 = ENDIAN = Big Endian
RDATA[2:1] = 10 = MRGMODE1-0 = Full merge & All bytes
RDATA[3] = -- = RESERVED
RDATA[5:4] = 10 = VRCLKSEL1-0 = 187MHz
RDATA[8:6] = 101 = MCLKSEL2-0 = 166MHz
RDATA[9] = 1 = ROMBEND = Big Endian
RDATA[10] = 1 = BWSEL = 8bit
RDATA[11] = 1 = MINIBOOT = use miniboot
RDATA[13:12] = 11 = BOOTSEL1-0 = Nand, then Memory Stick
RDATA[15:14] = 00 = BOOT_NAND_SEL1-0 = <256mbit
RADD[25] = 1 = EJTAG_MODE = EJTAG
RADD[24] = 0 = DINT_EN = disable
RADD[23] = 1 = DSYSELB = main only
RADD[22] = 1 = PCIMODE = host
RADD[21:20] = 00 = PCI_SIZE1-0 = 32Mbyte
RADD[19] = 0 = NANDCS = CS0
MCLKSEL2
BWSEL
0.5%
0
MINIBOOT
DSYSELB
STRAP PINS
OPTION #3
OPTION #1
BOOT_NAND_SEL_0
0
0
VRCLKSEL0
0
PLACE THESE CAPACITORS CLOSE TO IC PINS.
ENDIAN
MRGMODE0
0
MRGMODE1
MCLKSEL0
THIS BOX IN SAME AREA ON PWB
S/W OPTION SELECT RESISTORS
BOOTSEL0
ROMBEND
PCI_SIZE1
PCI_SIZE0
0
BC1
2/14
BC1 - SE2AG
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
