6
6
3-4. SCHEMATIC DIAGRAM — CRADLE SECTION —
IT-B1
3-3. PRINTED WIRING BOARD — CRADLE SECTION —
Note:
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
%
: indicates tolerance.
•
¢
: internal component.
•
C
: panel designation.
•
U
: B+ Line.
• Power voltage is dc 12V and fed with regulated dc power
supply from J3 with 100
Ω
in series.
• Voltage is dc with respect to ground under no-signal
condition.
no mark : OFF HOOK
(
) : ON HOOK
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Signal path.
N
: RX (from TEL LINE)
O
: TX (to TEL LINE)
P
: bell
Note:
•
X
: parts extracted from the component side.
•
¢
: internal component.
•
b
: Pattern from the side which enables seeing.
(The other layer’s patterns are not indicated.)
D33
D-2
D34
D-1
IC1
B-2
ZD1
B-1
D1
A-3
D2
A-3
D3
A-3
D4
B-3
D5
B-1
D31
C-2
D32
C-1
• Semiconductor Location
Ref. No.
Location
Ref. No.
Location
JW
