Sony IPELA SNC-CS10, Service Manual

Page: 25 / 56

3-1
SNC-CS10/CS11
Section 3
Circuit Description
3-1. Processing Block of Video and
Audio Data
3-1-1. Processing Block of Video Data
The analog video signal obtained using CCD (IC101) on
the SE-849 board is converted from analog to digital after
CDS and gain are adjusted using IC201 (on the PR-297
board). Next, data is read using camera DSP (IC203) to
perform digital signal processing (such as gamma
correction and AWB). After that, data is read using DSP
(IC101) of TI on the SY-339 board to perform MPEG
compression or JPEG compression and distributed to a
network through a network controller (IC302 on the SY-
339 board). And simultaneously, the data read using DSP
(IC101 on the SY-339 board) of TI on the SY-339 board is
processed using a video encoder inside a chip and output
as a composite signal. The resultant data is output as a test
signal through a low-pass filter and video buffer (IC401).
3-1-2. Processing Block of Audio Data
An external microphone signal on the SY-339 board is
read using an audio codec (IC402 on the SY-339 board
*
)
and converted from analog to digital after it is amplified
using IC152 (on the SY-339 board). After that, the signal
is read into DSP (IC101 on the SY-339 board) of TI using
a digital interface. Data is audio-compressed using IC101
(on the SY-339 board) and distributed to a network
through a network controller (IC302). The audio data
transferred from a personal computer is also read using
IC302 (on the SY-339 board) through a network and
expanded using IC101 (on the SY-339 board). After that,
the data is converted from digital to analog using an audio
codec (IC402 on the SY-339 board
*
) and output through a
mini-jack. In the AUDIO (IN/OUT) inspection of SY
board check application, the microphone signal input to
IC402 (on the SY-339 board
*
) is looped back in this IC
and output as an analog signal. Notice that the flow of this
signal processing differs from that of the signal processing
used ordinarily.
(
*
): Used for SNC-CS11 only.
3-2. Boards
3-2-1. SE-849 Board
CCD (IC101)
This is a progressive scan 1/4-size CCD that is compatible
with VGA. The total number of pixels is 380,000, and the
number of effective pixels is 350,000.
V-Driver (IC102)
This is a vertical clock driver that incorporates the
reference voltage generator circuit for a CCD image
sensor. This driver drives CCD (IC101).
3-2-2. PR-297 Board
AFE (IC201)
After AFE adjusts the analog camera signal, read from
CCD, as CDS and PGA, it converts the signal into a digital
signal using a 10-bit A/D converter and outputs it.
Camera DSP (IC203)
This camera DSP processes the data, received from AFE,
using a camera digital signal processing IC (AWB and
image conversion) and transfers it to IC101 (on the SY-339
board) using a Y/C-separated 16-bit signal. It also drives a
drive pulse to TG. IC203 is controlled by a camera
microcomputer (IC204).
Camera CPU (IC204)
This camera CPU is used to control a camera. It has ROM
(32K) and RAM (2K) with a write-type program. The
camera CPU communicates with AFE using a three-wire
serial interface and communicates with host CPU (IC101
on the SY-339 board) using an I
2
C interface.
EEPROM (IC202)
The adjusted camera data is written in EEPROM (IC202).